NXP MIMXRT595-EVK

Overview

i.MX RT500 crossover MCUs are part of the edge computing family and are optimized for low-power HMI applications by combining a graphics engine and a streamlined Cadence Tensilica Fusion F1 DSP core with a next-generation Arm Cortex-M33 core. These devices are designed to unlock the potential of display-based applications with a secure, power-optimized embedded processor.

i.MX RT500 MCUs provides up to 5MB of on-chip SRAM and several high-bandwidth interfaces to access off-chip flash, including an Octal/Quad SPI interface with an on-the-fly decryption engine.

Hardware

MIMXRT595SFFOC Cortex-M33 (275 MHz) core processor with Cadence Tensilica Fusion F1 DSP
Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
USB2.0 high-speed host and device with micro USB connector and external crystal
Octal/Quad/pSRAM external memories via FlexSPI
5 MB system SRAM
Full size SD card slot (SDIO)
On-board eMMC chip
On-board 5 V inputs NXP PCA9420UK PMIC providing 1.2 V, 1.8 V, 3.3 V
User LEDs
Reset and User buttons
MIPI-DSI connector
Single row headers for ARDUINO signals and MikroBus connector
FlexIO connector for MikroElektronica TFT Proto 5 inch capacitive touch display
One motion sensor combo accelero-/magneto-meter NXP FXOS8700CQ
Stereo audio codec with line-In/ line-Out/ and Microphone
Pmod/host expansion connector
NXP TFA9896 audio digital amplifier
Support for up to eight off-board digital microphones via 12-pin header
Two on-board digital microphones

For more information about the MIMXRT595 SoC and MIMXRT595-EVK board, see these references:

Supported Features

NXP considers the MIMXRT595-EVK as a superset board for the i.MX RT5xx family of MCUs. This board is a focus for NXP’s Full Platform Support for Zephyr, to better enable the entire RT5xx family. NXP prioritizes enabling this board with new support for Zephyr features. The mimxrt595_evk board configuration supports the hardware features below. Another very similar board is the NXP MIMXRT685-EVK, and that board may have additional features already supported, which can also be re-used on this mimxrt595_evk board:

Interface	Controller	Driver/Component
NVIC	on-chip	nested vector interrupt controller
SYSTICK	on-chip	systick
OS_TIMER	on-chip	os timer
IOCON	on-chip	pinmux
GPIO	on-chip	gpio
USART	on-chip	serial port-polling; serial port-interrupt
CLOCK	on-chip	clock_control
I2C	on-chip	i2c
SPI	on-chip	spi
CTIMER	on-chip	counter
WDT	on-chip	watchdog
FLASH	on-chip	OctalSPI Flash
TRNG	on-chip	entropy
USB	on-chip	USB device
FLEXSPI	on-chip	flash programming
RTC	on-chip	counter

The default configuration can be found in the defconfig file:

boards/arm/mimxrt595_evk/mimxrt595_evk_cm33_defconfig

Other hardware features are not currently supported by the port.

Connections and IOs

The MIMXRT595 SoC has IOCON registers, which can be used to configure the functionality of a pin.

Name	Function	Usage
PIO0_2	USART0	USART RX
PIO0_1	USART0	USART TX
PIO0_14	GPIO	GREEN LED
PIO0_25	GPIO	SW0
PIO0_10	GPIO	SW1
PIO4_30	USART12	USART TX
PIO4_31	USART12	USART RX
PIO0_29	I2C	I2C SCL
PIO0_30	I2C	I2C SDA
PIO0_22	GPIO	FXOS8700 TRIGGER
PIO1_5	SPI	SPI MOSI
PIO1_4	SPI	SPI MISO
PIO1_3	SPI	SPI SCK
PIO1_6	SPI	SPI SSEL

System Clock

The MIMXRT595 EVK is configured to use the OS Event timer as a source for the system clock.

Serial Port

The MIMXRT595 SoC has 13 FLEXCOMM interfaces for serial communication. One is configured as USART for the console and the remaining are not used.

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the LPC-Link2.

Install the J-Link Debug Host Tools and make sure they are in your search path.
To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19, if not already done (these jumpers are installed by default).
Follow the instructions in LPC-Link2 J-Link Onboard Debug Probe to program the J-Link firmware. Please make sure you have the latest firmware for this board.

Configuring a Console

Connect a USB cable from your PC to J40, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:

Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1

Flashing

Here is an example for the Hello World application. This example uses the J-Link Debug Host Tools as default.

# From the root of the zephyr repository
west build -b mimxrt595_evk_cm33 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

*** Booting Zephyr OS v2.7 ***
Hello World! mimxrt595_evk_cm33

Debugging

Here is an example for the Hello World application. This example uses the J-Link Debug Host Tools as default.

# From the root of the zephyr repository
west build -b mimxrt595_evk_cm33 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

*** Booting Zephyr OS v2.7 ***
Hello World! mimxrt595_evk_cm33

Troubleshooting

If the debug probe fails to connect with the following error, it’s possible that the image in flash is interfering and causing this issue.

Remote debugging using :2331
Remote communication error.  Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.

You can fix it by erasing and reprogramming the flash with the following steps:

Set the SW7 DIP switches to ON-ON-ON to prevent booting from flash.
Reset by pressing SW3
Run west debug or west flash again with a known working Zephyr application (example “Hello World”).
Set the SW5 DIP switches to OFF-OFF-ON to boot from flash.
Reset by pressing SW3