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CONFIG_LAZY_FPU_SHARING
¶
(No prompt – not directly user assignable.)
Type: bool
Help¶
This hidden option allows multiple threads to use the floating point registers, using logic to lazily save/restore the floating point register state on context switch.
On Intel Core processors, may be vulnerable to exploits which allows malware to read the contents of all floating point registers, see CVE-2018-3665.
Direct dependencies¶
FPU
&& !EAGER_FPU_SHARING
&& FPU_SHARING
&& CPU_HAS_FPU
&& !X86_64
&& X86
(Includes any dependencies from ifs and menus.)
Default¶
y if
X86_NO_LAZY_FP
|| !USERSPACE
Kconfig definition¶
At <Zephyr>/arch/x86/core/Kconfig.ia32:127
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:29
→ <Zephyr>/arch/Kconfig:12
→ <Zephyr>/arch/x86/Kconfig:326
Menu path: (Top) → X86 Architecture Options → Processor Capabilities → Architecture Floating Point Options
config LAZY_FPU_SHARING bool default y ifX86_NO_LAZY_FP
|| !USERSPACE
depends onFPU
&& !EAGER_FPU_SHARING
&&FPU_SHARING
&&CPU_HAS_FPU
&& !X86_64
&&X86
help This hidden option allows multiple threads to use the floating point registers, using logic to lazily save/restore the floating point register state on context switch. On Intel Core processors, may be vulnerable to exploits which allows malware to read the contents of all floating point registers, see CVE-2018-3665.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)