Help¶

This hidden option unconditionally saves/restores the FPU/SIMD register state on every context switch.

Mitigates CVE-2018-3665, but incurs a performance hit.

For vulnerable systems that process sensitive information in the FPU register set, should be used any time CONFIG_FPU is enabled, regardless if the FPU is used by one thread or multiple.

Direct dependencies¶

FPU && USERSPACE && CPU_HAS_FPU && !X86_64 && X86

(Includes any dependencies from ifs and menus.)

Default¶

y if !X86_NO_LAZY_FP

Kconfig definition¶

At <Zephyr>/arch/x86/core/Kconfig.ia32:112

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:29 → <Zephyr>/arch/Kconfig:12 → <Zephyr>/arch/x86/Kconfig:326

Menu path: (Top) → X86 Architecture Options → Processor Capabilities → Architecture Floating Point Options

config EAGER_FPU_SHARING
    bool
    default y if !X86_NO_LAZY_FP
    depends on FPU && USERSPACE && CPU_HAS_FPU && !X86_64 && X86
    help
      This hidden option unconditionally saves/restores the FPU/SIMD
      register state on every context switch.

      Mitigates CVE-2018-3665, but incurs a performance hit.

      For vulnerable systems that process sensitive information in the
      FPU register set, should be used any time CONFIG_FPU is
      enabled, regardless if the FPU is used by one thread or multiple.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)