Help¶

This option enables the hardware Floating Point Unit (FPU), in order to support using the floating point registers and instructions.

When this option is enabled, by default, threads may use the floating point registers only in an exclusive manner, and this usually means that only one thread may perform floating point operations.

If it is necessary for multiple threads to perform concurrent floating point operations, the “FPU register sharing” option must be enabled to preserve the floating point registers across context switches.

Note that this option cannot be selected for the platforms that do not include a hardware floating point unit; the floating point support for those platforms is dependent on the availability of the toolchain- provided software floating point library.

Direct dependencies¶

(SOC_MCIMX6X_M4 && SOC_SERIES_IMX_6X_M4) || (CPU_HAS_FPU && (ARC || ARM || RISCV || SPARC || X86))

(Includes any dependencies from ifs and menus.)

Default¶

y

Symbols that select this symbol¶

Symbols that imply this symbol¶

Kconfig definitions¶

At <Zephyr>/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4:11

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:19 → <BuildDir>/Kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/arm/nxp_imx/Kconfig.defconfig:4 → <Zephyr>/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.series:15

Menu path: (Top)

config FPU
    bool
    default y
    depends on SOC_MCIMX6X_M4 && SOC_SERIES_IMX_6X_M4

At <Zephyr>/arch/Kconfig:682

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:29

Menu path: (Top) → Floating Point Options

config FPU
    bool "Enable floating point unit (FPU)"
    depends on CPU_HAS_FPU && (ARC || ARM || RISCV || SPARC || X86)
    help
      This option enables the hardware Floating Point Unit (FPU), in order to
      support using the floating point registers and instructions.

      When this option is enabled, by default, threads may use the floating
      point registers only in an exclusive manner, and this usually means that
      only one thread may perform floating point operations.

      If it is necessary for multiple threads to perform concurrent floating
      point operations, the "FPU register sharing" option must be enabled to
      preserve the floating point registers across context switches.

      Note that this option cannot be selected for the platforms that do not
      include a hardware floating point unit; the floating point support for
      those platforms is dependent on the availability of the toolchain-
      provided software floating point library.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)