Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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loapic.h File Reference

Go to the source code of this file.

Macros

#define LOAPIC_ID   0x020 /* Local APIC ID Reg */
 
#define LOAPIC_VER   0x030 /* Local APIC Version Reg */
 
#define LOAPIC_TPR   0x080 /* Task Priority Reg */
 
#define LOAPIC_APR   0x090 /* Arbitration Priority Reg */
 
#define LOAPIC_PPR   0x0a0 /* Processor Priority Reg */
 
#define LOAPIC_EOI   0x0b0 /* EOI Reg */
 
#define LOAPIC_LDR   0x0d0 /* Logical Destination Reg */
 
#define LOAPIC_DFR   0x0e0 /* Destination Format Reg */
 
#define LOAPIC_SVR   0x0f0 /* Spurious Interrupt Reg */
 
#define LOAPIC_ISR   0x100 /* In-service Reg */
 
#define LOAPIC_TMR   0x180 /* Trigger Mode Reg */
 
#define LOAPIC_IRR   0x200 /* Interrupt Request Reg */
 
#define LOAPIC_ESR   0x280 /* Error Status Reg */
 
#define LOAPIC_ICRLO   0x300 /* Interrupt Command Reg */
 
#define LOAPIC_ICRHI   0x310 /* Interrupt Command Reg */
 
#define LOAPIC_TIMER   0x320 /* LVT (Timer) */
 
#define LOAPIC_THERMAL   0x330 /* LVT (Thermal) */
 
#define LOAPIC_PMC   0x340 /* LVT (PMC) */
 
#define LOAPIC_LINT0   0x350 /* LVT (LINT0) */
 
#define LOAPIC_LINT1   0x360 /* LVT (LINT1) */
 
#define LOAPIC_ERROR   0x370 /* LVT (ERROR) */
 
#define LOAPIC_TIMER_ICR   0x380 /* Timer Initial Count Reg */
 
#define LOAPIC_TIMER_CCR   0x390 /* Timer Current Count Reg */
 
#define LOAPIC_TIMER_CONFIG   0x3e0 /* Timer Divide Config Reg */
 
#define LOAPIC_SELF_IPI   0x3f0 /* Self IPI Reg, only support in X2APIC mode */
 
#define LOAPIC_ICR_BUSY   0x00001000 /* delivery status: 1 = busy */
 
#define LOAPIC_ICR_IPI_OTHERS   0x000C4000U /* normal IPI to other CPUs */
 
#define LOAPIC_ICR_IPI_INIT   0x00004500U
 
#define LOAPIC_ICR_IPI_STARTUP   0x00004600U
 
#define LOAPIC_LVT_MASKED   0x00010000 /* mask */
 
#define LOAPIC_REGS_STR   loapic_regs /* mmio device name */
 

Functions

 DEVICE_MMIO_TOPLEVEL_DECLARE (loapic_regs)
 
static uint64_t x86_read_x2apic (unsigned int reg)
 Read 64-bit value from the local APIC in x2APIC mode.
 
static uint32_t x86_read_xapic (unsigned int reg)
 Read 32-bit value from the local APIC in xAPIC (MMIO) mode.
 
static uint32_t x86_read_loapic (unsigned int reg)
 Read value from the local APIC using the default mode.
 
static void x86_write_x2apic (unsigned int reg, uint64_t val)
 Write 64-bit value to the local APIC in x2APIC mode.
 
static void x86_write_xapic (unsigned int reg, uint32_t val)
 Write 32-bit value to the local APIC in xAPIC (MMIO) mode.
 
static void x86_write_loapic (unsigned int reg, uint32_t val)
 Write 32-bit value to the local APIC using the default mode.
 

Macro Definition Documentation

◆ LOAPIC_APR

#define LOAPIC_APR   0x090 /* Arbitration Priority Reg */

◆ LOAPIC_DFR

#define LOAPIC_DFR   0x0e0 /* Destination Format Reg */

◆ LOAPIC_EOI

#define LOAPIC_EOI   0x0b0 /* EOI Reg */

◆ LOAPIC_ERROR

#define LOAPIC_ERROR   0x370 /* LVT (ERROR) */

◆ LOAPIC_ESR

#define LOAPIC_ESR   0x280 /* Error Status Reg */

◆ LOAPIC_ICR_BUSY

#define LOAPIC_ICR_BUSY   0x00001000 /* delivery status: 1 = busy */

◆ LOAPIC_ICR_IPI_INIT

#define LOAPIC_ICR_IPI_INIT   0x00004500U

◆ LOAPIC_ICR_IPI_OTHERS

#define LOAPIC_ICR_IPI_OTHERS   0x000C4000U /* normal IPI to other CPUs */

◆ LOAPIC_ICR_IPI_STARTUP

#define LOAPIC_ICR_IPI_STARTUP   0x00004600U

◆ LOAPIC_ICRHI

#define LOAPIC_ICRHI   0x310 /* Interrupt Command Reg */

◆ LOAPIC_ICRLO

#define LOAPIC_ICRLO   0x300 /* Interrupt Command Reg */

◆ LOAPIC_ID

#define LOAPIC_ID   0x020 /* Local APIC ID Reg */

◆ LOAPIC_IRR

#define LOAPIC_IRR   0x200 /* Interrupt Request Reg */

◆ LOAPIC_ISR

#define LOAPIC_ISR   0x100 /* In-service Reg */

◆ LOAPIC_LDR

#define LOAPIC_LDR   0x0d0 /* Logical Destination Reg */

◆ LOAPIC_LINT0

#define LOAPIC_LINT0   0x350 /* LVT (LINT0) */

◆ LOAPIC_LINT1

#define LOAPIC_LINT1   0x360 /* LVT (LINT1) */

◆ LOAPIC_LVT_MASKED

#define LOAPIC_LVT_MASKED   0x00010000 /* mask */

◆ LOAPIC_PMC

#define LOAPIC_PMC   0x340 /* LVT (PMC) */

◆ LOAPIC_PPR

#define LOAPIC_PPR   0x0a0 /* Processor Priority Reg */

◆ LOAPIC_REGS_STR

#define LOAPIC_REGS_STR   loapic_regs /* mmio device name */

◆ LOAPIC_SELF_IPI

#define LOAPIC_SELF_IPI   0x3f0 /* Self IPI Reg, only support in X2APIC mode */

◆ LOAPIC_SVR

#define LOAPIC_SVR   0x0f0 /* Spurious Interrupt Reg */

◆ LOAPIC_THERMAL

#define LOAPIC_THERMAL   0x330 /* LVT (Thermal) */

◆ LOAPIC_TIMER

#define LOAPIC_TIMER   0x320 /* LVT (Timer) */

◆ LOAPIC_TIMER_CCR

#define LOAPIC_TIMER_CCR   0x390 /* Timer Current Count Reg */

◆ LOAPIC_TIMER_CONFIG

#define LOAPIC_TIMER_CONFIG   0x3e0 /* Timer Divide Config Reg */

◆ LOAPIC_TIMER_ICR

#define LOAPIC_TIMER_ICR   0x380 /* Timer Initial Count Reg */

◆ LOAPIC_TMR

#define LOAPIC_TMR   0x180 /* Trigger Mode Reg */

◆ LOAPIC_TPR

#define LOAPIC_TPR   0x080 /* Task Priority Reg */

◆ LOAPIC_VER

#define LOAPIC_VER   0x030 /* Local APIC Version Reg */

Function Documentation

◆ DEVICE_MMIO_TOPLEVEL_DECLARE()

DEVICE_MMIO_TOPLEVEL_DECLARE ( loapic_regs  )

◆ x86_read_loapic()

static uint32_t x86_read_loapic ( unsigned int  reg)
inlinestatic

Read value from the local APIC using the default mode.

Returns a 32-bit value read from the local APIC, using the access method determined by CONFIG_X2APIC (either xAPIC or x2APIC). Note that 64-bit reads are only allowed in x2APIC mode and can only be done by calling x86_read_x2apic() directly. (This is intentional.)

Parameters
regthe LOAPIC register number to read (LOAPIC_*)

◆ x86_read_x2apic()

static uint64_t x86_read_x2apic ( unsigned int  reg)
inlinestatic

Read 64-bit value from the local APIC in x2APIC mode.

Parameters
regthe LOAPIC register number to read (LOAPIC_*)

◆ x86_read_xapic()

static uint32_t x86_read_xapic ( unsigned int  reg)
inlinestatic

Read 32-bit value from the local APIC in xAPIC (MMIO) mode.

Parameters
regthe LOAPIC register number to read (LOAPIC_*)

◆ x86_write_loapic()

static void x86_write_loapic ( unsigned int  reg,
uint32_t  val 
)
inlinestatic

Write 32-bit value to the local APIC using the default mode.

Write a 32-bit value to the local APIC, using the access method determined by CONFIG_X2APIC (either xAPIC or x2APIC). Note that 64-bit writes are only available in x2APIC mode and can only be done by calling x86_write_x2apic() directly. (This is intentional.)

Parameters
regthe LOAPIC register number to write (one of LOAPIC_*)
val32-bit value to write

◆ x86_write_x2apic()

static void x86_write_x2apic ( unsigned int  reg,
uint64_t  val 
)
inlinestatic

Write 64-bit value to the local APIC in x2APIC mode.

Parameters
regthe LOAPIC register number to write (one of LOAPIC_*)
val64-bit value to write

◆ x86_write_xapic()

static void x86_write_xapic ( unsigned int  reg,
uint32_t  val 
)
inlinestatic

Write 32-bit value to the local APIC in xAPIC (MMIO) mode.

Parameters
regthe LOAPIC register number to write (one of LOAPIC_*)
val32-bit value to write