nRF51 SDK
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APIs for the SoC library. More...
Modules | |
SoC Library Error Codes | |
Error definitions for the SoC library. | |
Macros | |
#define | SOC_SVC_BASE 0x20 |
The number of the lowest SVC number reserved for the SoC library. | |
Typedefs | |
typedef volatile uint8_t | nrf_mutex_t |
Represents a mutex for use with the nrf_mutex functions. More... | |
typedef uint8_t | nrf_power_mode_t |
Represents a power mode, used in power mode functions. | |
typedef uint8_t | nrf_power_failure_threshold_t |
Represents a power failure threshold value. | |
typedef void(* | nrf_power_failure_callback_t )(void) |
Power failure threshold callback. | |
Enumerations | |
enum | { SD_MUTEX_NEW = SOC_SVC_BASE, SD_MUTEX_ACQUIRE, SD_MUTEX_RELEASE, SD_NVIC_ENABLEIRQ, SD_NVIC_DISABLEIRQ, SD_NVIC_GETPENDINGIRQ, SD_NVIC_SETPENDINGIRQ, SD_NVIC_CLEARPENDINGIRQ, SD_NVIC_SETPRIORITY, SD_NVIC_GETPRIORITY, SD_NVIC_SYSTEMRESET, SD_NVIC_CRITICAL_REGION_ENTER, SD_NVIC_CRITICAL_REGION_EXIT, SD_RAND_APPLICATION_POOL_CAPACITY, SD_RAND_APPLICATION_BYTES_AVAILABLE, SD_RAND_APPLICATION_GET_VECTOR, SD_POWER_MODE_SET, SD_RESERVED_1, SD_RESERVED_2, SD_RESERVED_3, SD_RESERVED_4, SD_POWER_SYSTEM_OFF, SD_POWER_RESET_REASON_GET, SD_POWER_RESET_REASON_CLR, SD_POWER_POF_ENABLE, SD_POWER_POF_THRESHOLD_SET, SD_POWER_RAMON_SET, SD_POWER_RAMON_CLR, SD_POWER_RAMON_GET, SD_NRF_APP_EVENT_WAIT, SD_CLOCK_HFCLK_REQUEST, SD_CLOCK_HFCLK_RELEASE, SD_CLOCK_HFCLK_IS_RUNNING, SD_PPI_CHANNEL_ENABLE_GET, SD_PPI_CHANNEL_ENABLE_SET, SD_PPI_CHANNEL_ENABLE_CLR, SD_PPI_CHANNEL_ASSIGN, SD_PPI_GROUP_TASK_ENABLE, SD_PPI_GROUP_TASK_DISABLE, SD_PPI_GROUP_ASSIGN, SD_PPI_GROUP_GET, SVC_SOC_LAST } |
The SVC numbers used by the SVC functions in the SoC library. | |
enum | { NRF_MUTEX_FREE, NRF_MUTEX_TAKEN } |
Possible values of a nrf_mutex_t. | |
enum | nrf_app_irq_priority_t { NRF_APP_PRIORITY_HIGH = 1, NRF_APP_PRIORITY_LOW = 3, NRF_APP_PRIORITY_HIGH = 1, NRF_APP_PRIORITY_LOW = 3 } |
The interrupt priorities available to the application while the softdevice is active. | |
enum | { NRF_POWER_MODE_CONSTLAT, NRF_POWER_MODE_LOWPWR } |
Possible values of nrf_power_mode_t. More... | |
enum | { NRF_POWER_THRESHOLD_V21, NRF_POWER_THRESHOLD_V23, NRF_POWER_THRESHOLD_V25, NRF_POWER_THRESHOLD_V27 } |
Possible values of nrf_power_failure_threshold_t. More... | |
Functions | |
uint32_t | SVCALL (SD_MUTEX_NEW) sd_mutex_new(nrf_mutex_t *p_mutex) |
Initialize a mutex. More... | |
uint32_t | SVCALL (SD_MUTEX_ACQUIRE) sd_mutex_acquire(nrf_mutex_t *p_mutex) |
Attempt to acquire a mutex. More... | |
uint32_t | SVCALL (SD_MUTEX_RELEASE) sd_mutex_release(nrf_mutex_t *p_mutex) |
Release a mutex. More... | |
uint32_t | SVCALL (SD_NVIC_ENABLEIRQ) sd_nvic_EnableIRQ(IRQn_Type IRQn) |
Enable External Interrupt. More... | |
uint32_t | SVCALL (SD_NVIC_DISABLEIRQ) sd_nvic_DisableIRQ(IRQn_Type IRQn) |
Disable External Interrupt. More... | |
uint32_t | SVCALL (SD_NVIC_GETPENDINGIRQ) sd_nvic_GetPendingIRQ(IRQn_Type IRQn |
Get Pending Interrupt. More... | |
uint32_t | SVCALL (SD_NVIC_SETPENDINGIRQ) sd_nvic_SetPendingIRQ(IRQn_Type IRQn) |
Set Pending Interrupt. More... | |
uint32_t | SVCALL (SD_NVIC_CLEARPENDINGIRQ) sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) |
Clear Pending Interrupt. More... | |
uint32_t | SVCALL (SD_NVIC_SETPRIORITY) sd_nvic_SetPriority(IRQn_Type IRQn |
Set Interrupt Priority. More... | |
uint32_t | SVCALL (SD_NVIC_GETPRIORITY) sd_nvic_GetPriority(IRQn_Type IRQn |
Get Interrupt Priority. More... | |
uint32_t | SVCALL (SD_NVIC_SYSTEMRESET) sd_nvic_SystemReset(void) |
System Reset. More... | |
uint32_t | SVCALL (SD_NVIC_CRITICAL_REGION_ENTER) sd_nvic_critical_region_enter(uint8_t *p_is_nested_critical_region) |
Enters critical region. More... | |
uint32_t | SVCALL (SD_NVIC_CRITICAL_REGION_EXIT) sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) |
Exit critical region. More... | |
uint32_t | SVCALL (SD_RAND_APPLICATION_POOL_CAPACITY) sd_rand_application_pool_capacity_get(uint8_t *p_pool_capacity) |
Query the capacity of the application random pool. More... | |
uint32_t | SVCALL (SD_RAND_APPLICATION_BYTES_AVAILABLE) sd_rand_application_bytes_available_get(uint8_t *p_bytes_available) |
Get number of random bytes available to the application. More... | |
uint32_t | SVCALL (SD_RAND_APPLICATION_GET_VECTOR) sd_rand_application_vector_get(uint8_t *p_buff |
Get random bytes from the application pool. More... | |
uint32_t | SVCALL (SD_POWER_RESET_REASON_GET) sd_power_reset_reason_get(uint32_t *p_reset_reason) |
Gets the reset reason register. More... | |
uint32_t | SVCALL (SD_POWER_RESET_REASON_CLR) sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk) |
Clears the bits of the reset reason register. More... | |
uint32_t | SVCALL (SD_POWER_MODE_SET) sd_power_mode_set(nrf_power_mode_t power_mode) |
Sets the power mode when in CPU sleep. More... | |
uint32_t | SVCALL (SD_POWER_SYSTEM_OFF) sd_power_system_off(void) |
Puts the chip in System OFF mode. More... | |
uint32_t | SVCALL (SD_POWER_POF_ENABLE) sd_power_pof_enable(uint8_t pof_enable |
Enables or disables the power-fail comparator. More... | |
uint32_t | SVCALL (SD_POWER_POF_THRESHOLD_SET) sd_power_pof_threshold_set(nrf_power_failure_threshold_t threshold) |
Sets the power-fail threshold value. More... | |
uint32_t | SVCALL (SD_POWER_RAMON_SET) sd_power_ramon_set(uint32_t ramon) |
Sets bits in the NRF_POWER->RAMON register. More... | |
uint32_t | SVCALL (SD_POWER_RAMON_CLR) sd_power_ramon_clr(uint32_t ramon) |
Clears bits in the NRF_POWER->RAMON register. More... | |
uint32_t | SVCALL (SD_POWER_RAMON_GET) sd_power_ramon_get(uint32_t *p_ramon) |
Get contents of NRF_POWER->RAMON register, indicates power status of ram blocks. More... | |
uint32_t | SVCALL (SD_CLOCK_HFCLK_REQUEST) sd_clock_hfclk_request(void) |
Request the high frequency crystal oscillator. More... | |
uint32_t | SVCALL (SD_CLOCK_HFCLK_RELEASE) sd_clock_hfclk_release(void) |
Releases the high frequency crystal oscillator. More... | |
uint32_t | SVCALL (SD_CLOCK_HFCLK_IS_RUNNING) sd_clock_hfclk_is_running(uint32_t *p_is_running) |
Checks if the high frequency crystal oscillator is running. More... | |
uint32_t | SVCALL (SD_NRF_APP_EVENT_WAIT) sd_app_event_wait(void) |
Waits for an application event. More... | |
uint32_t | SVCALL (SD_PPI_CHANNEL_ENABLE_GET) sd_ppi_channel_enable_get(uint32_t *p_channel_enable) |
Get PPI channel enable register contents. More... | |
uint32_t | SVCALL (SD_PPI_CHANNEL_ENABLE_SET) sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk) |
Set PPI channel enable register. More... | |
uint32_t | SVCALL (SD_PPI_CHANNEL_ENABLE_CLR) sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk) |
Clear PPI channel enable register. More... | |
uint32_t | SVCALL (SD_PPI_CHANNEL_ASSIGN) sd_ppi_channel_assign(uint8_t channel_num |
Assign endpoints to a PPI channel. More... | |
uint32_t | SVCALL (SD_PPI_GROUP_TASK_ENABLE) sd_ppi_group_task_enable(uint8_t group_num) |
Task to enable a channel group. More... | |
uint32_t | SVCALL (SD_PPI_GROUP_TASK_DISABLE) sd_ppi_group_task_disable(uint8_t group_num) |
Task to disable a channel group. More... | |
uint32_t | SVCALL (SD_PPI_GROUP_ASSIGN) sd_ppi_group_assign(uint8_t group_num |
Assign PPI channels to a channel group. More... | |
uint32_t | SVCALL (SD_PPI_GROUP_GET) sd_ppi_group_get(uint8_t group_num |
Gets the PPI channels of a channel group. More... | |
Variables | |
uint32_t uint32_t * | p_pending_irq |
uint32_t nrf_app_irq_priority_t | priority |
uint32_t nrf_app_irq_priority_t * | p_priority |
uint32_t uint8_t | length |
uint32_t nrf_power_failure_callback_t | pof_callback |
uint32_t const volatile void * | event_endpoint |
uint32_t const volatile void const volatile void * | task_endpoint |
uint32_t uint32_t | channel_msk |
uint32_t uint32_t * | p_channel_msk |
typedef volatile uint8_t nrf_mutex_t |
anonymous enum |
anonymous enum |
uint32_t SVCALL | ( | SD_MUTEX_NEW | ) |
[in] | p_mutex | Pointer to the mutex to initialize. |
uint32_t SVCALL | ( | SD_MUTEX_ACQUIRE | ) |
[in] | p_mutex | Pointer to the mutex to acquire. |
uint32_t SVCALL | ( | SD_MUTEX_RELEASE | ) |
[in] | p_mutex | Pointer to the mutex to release. |
uint32_t SVCALL | ( | SD_NVIC_ENABLEIRQ | ) |
[in] | IRQn | See the NVIC_EnableIRQ documentation in CMSIS. |
uint32_t SVCALL | ( | SD_NVIC_DISABLEIRQ | ) |
[in] | IRQn | See the NVIC_DisableIRQ documentation in CMSIS |
uint32_t SVCALL | ( | SD_NVIC_GETPENDINGIRQ | ) |
[in] | IRQn | See the NVIC_GetPendingIRQ documentation in CMSIS. |
[out] | p_pending_irq | Return value from NVIC_GetPendingIRQ. |
uint32_t SVCALL | ( | SD_NVIC_SETPENDINGIRQ | ) |
[in] | IRQn | See the NVIC_SetPendingIRQ documentation in CMSIS. |
uint32_t SVCALL | ( | SD_NVIC_CLEARPENDINGIRQ | ) |
[in] | IRQn | See the NVIC_ClearPendingIRQ documentation in CMSIS. |
uint32_t SVCALL | ( | SD_NVIC_SETPRIORITY | ) |
[in] | IRQn | See the NVIC_SetPriority documentation in CMSIS. |
[in] | priority | A valid IRQ priority for use by the application. |
uint32_t SVCALL | ( | SD_NVIC_GETPRIORITY | ) |
[in] | IRQn | See the NVIC_GetPriority documentation in CMSIS. |
[out] | p_priority | Return value from NVIC_GetPriority. |
uint32_t SVCALL | ( | SD_NVIC_SYSTEMRESET | ) |
uint32_t SVCALL | ( | SD_NVIC_CRITICAL_REGION_ENTER | ) |
[out] | p_is_nested_critical_region | 1: If in a nested critical region. 0: Otherwise. |
uint32_t SVCALL | ( | SD_NVIC_CRITICAL_REGION_EXIT | ) |
[in] | is_nested_critical_region | If this is set to 1, the critical region won't be exited. |
uint32_t SVCALL | ( | SD_RAND_APPLICATION_POOL_CAPACITY | ) |
[out] | p_pool_capacity | The capacity of the pool. |
uint32_t SVCALL | ( | SD_RAND_APPLICATION_BYTES_AVAILABLE | ) |
[out] | p_bytes_available | The number of bytes currently available in the pool. |
uint32_t SVCALL | ( | SD_RAND_APPLICATION_GET_VECTOR | ) |
[out] | p_buff | pointer to unit8_t buffer for storing the bytes. |
[in] | length | number of bytes to take from pool and place in p_buff. |
uint32_t SVCALL | ( | SD_POWER_RESET_REASON_GET | ) |
[out] | p_reset_reason | Contents of the NRF_POWER->RESETREAS register. |
uint32_t SVCALL | ( | SD_POWER_RESET_REASON_CLR | ) |
[in] | reset_reason_clr_msk | Contains the bits to clear from the reset reason register. |
uint32_t SVCALL | ( | SD_POWER_MODE_SET | ) |
[in] | power_mode | The power mode to use when in CPU sleep. |
uint32_t SVCALL | ( | SD_POWER_SYSTEM_OFF | ) |
uint32_t SVCALL | ( | SD_POWER_POF_ENABLE | ) |
The pof_callback will be called in SVC priority.
[in] | pof_enable | true if the power-fail comparator should be enabled, false if it should be disabled. |
[in] | pof_callback | power failure callback function to register, can be set to NULL-pointer when disabling. |
uint32_t SVCALL | ( | SD_POWER_POF_THRESHOLD_SET | ) |
[in] | threshold | The power-fail threshold value to use. |
uint32_t SVCALL | ( | SD_POWER_RAMON_SET | ) |
[in] | ramon | Contains the bits needed to be set in the NRF_POWER->RAMON register. |
uint32_t SVCALL | ( | SD_POWER_RAMON_CLR | ) |
ramon | Contains the bits needed to be cleared in the NRF_POWER->RAMON register. |
uint32_t SVCALL | ( | SD_POWER_RAMON_GET | ) |
[out] | p_ramon | Content of NRF_POWER->RAMON register. |
uint32_t SVCALL | ( | SD_CLOCK_HFCLK_REQUEST | ) |
Will start the high frequency crystal oscillator, the startup time of the crystal varies and the sd_clock_hfclk_is_running function can be polled to check if it has started.
uint32_t SVCALL | ( | SD_CLOCK_HFCLK_RELEASE | ) |
Will stop the high frequency crystal oscillator, this happens immediately.
uint32_t SVCALL | ( | SD_CLOCK_HFCLK_IS_RUNNING | ) |
[out] | p_is_running | 1 if the external crystal oscillator is running, 0 if not. |
uint32_t SVCALL | ( | SD_NRF_APP_EVENT_WAIT | ) |
An application event is either an application interrupt or a pended interrupt when the interrupt is disabled. When the interrupt is enabled it will be taken immediately since this function will wait in thread mode, then the execution will return in the application's main thread. When an interrupt is disabled and gets pended it will return to the application's thread main. The application must ensure that the pended flag is cleared using sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for disabled interrupts, as the interrupt handler will clear the pending flag automatically for enabled interrupts.
In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 System Control Register (SCR).
uint32_t SVCALL | ( | SD_PPI_CHANNEL_ENABLE_GET | ) |
[out] | p_channel_enable | The contents of the PPI CHEN register. |
uint32_t SVCALL | ( | SD_PPI_CHANNEL_ENABLE_SET | ) |
[in] | channel_enable_set_msk | Mask containing the bits to set in the PPI CHEN register. |
uint32_t SVCALL | ( | SD_PPI_CHANNEL_ENABLE_CLR | ) |
[in] | channel_enable_clr_msk | Mask containing the bits to clear in the PPI CHEN register. |
uint32_t SVCALL | ( | SD_PPI_CHANNEL_ASSIGN | ) |
[in] | channel_num | Number of the PPI channel to assign. |
[in] | event_endpoint | Event endpoint of the PPI channel. |
[in] | task_endpoint | Task endpoint of the PPI channel. |
uint32_t SVCALL | ( | SD_PPI_GROUP_TASK_ENABLE | ) |
[in] | group_num | Number of the channel group. |
uint32_t SVCALL | ( | SD_PPI_GROUP_TASK_DISABLE | ) |
[in] | group_num | Number of the PPI group. |
uint32_t SVCALL | ( | SD_PPI_GROUP_ASSIGN | ) |
[in] | group_num | Number of the channel group. |
[in] | channel_msk | Mask of the channels to assign to the group. |
uint32_t SVCALL | ( | SD_PPI_GROUP_GET | ) |
[in] | group_num | Number of the channel group. |
[out] | p_channel_msk | Mask of the channels assigned to the group. |