CONFIG_RISCV_HAS_CPU_IDLE¶
Does SOC has CPU IDLE instruction
Type: bool
Help¶
Does SOC has CPU IDLE instruction
Direct dependencies¶
SOC_RISCV32_LITEX_VEXRISCV || SOC_SERIES_RISCV32_MIV || SOC_SERIES_RISCV_SIFIVE_FREEDOM || SOC_SERIES_STARFIVE_JH71XX || SOC_SERIES_RISCV_TELINK_B91 || SOC_SERIES_RISCV_VIRT || SOC_RISCV32_LITEX_VEXRISCV || SOC_SERIES_RISCV32_MIV || SOC_SERIES_RISCV_SIFIVE_FREEDOM || SOC_SERIES_STARFIVE_JH71XX || SOC_SERIES_RISCV_TELINK_B91 || SOC_SERIES_RISCV_VIRT || RISCV
(Includes any dependencies from ifs and menus.)
Defaults¶
y
y
y
y
y
y
y
y
y
y
Kconfig definitions¶
At <Zephyr>/soc/riscv/litex-vexriscv/Kconfig.defconfig:12
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
depends on SOC_RISCV32_LITEX_VEXRISCV
At <Zephyr>/soc/riscv/riscv-privilege/miv/Kconfig.defconfig.series:14
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV32_MIV
At <Zephyr>/soc/riscv/riscv-privilege/sifive-freedom/Kconfig.defconfig.series:14
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
At <Zephyr>/soc/riscv/riscv-privilege/starfive_jh71xx/Kconfig.defconfig.series:15
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_STARFIVE_JH71XX
At <Zephyr>/soc/riscv/riscv-privilege/telink_b91/Kconfig.defconfig.series:18
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_TELINK_B91
At <Zephyr>/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series:15
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_VIRT
At <Zephyr>/soc/riscv/litex-vexriscv/Kconfig.defconfig:12
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
depends on SOC_RISCV32_LITEX_VEXRISCV
At <Zephyr>/soc/riscv/riscv-privilege/miv/Kconfig.defconfig.series:14
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV32_MIV
At <Zephyr>/soc/riscv/riscv-privilege/sifive-freedom/Kconfig.defconfig.series:14
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
At <Zephyr>/soc/riscv/riscv-privilege/starfive_jh71xx/Kconfig.defconfig.series:15
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_STARFIVE_JH71XX
At <Zephyr>/soc/riscv/riscv-privilege/telink_b91/Kconfig.defconfig.series:18
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_TELINK_B91
At <Zephyr>/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series:15
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6
Menu path: (Top)
config RISCV_HAS_CPU_IDLE
bool
default y
depends on SOC_SERIES_RISCV_VIRT
At <Zephyr>/arch/riscv/Kconfig:107
Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:37 → <Zephyr>/arch/Kconfig:12
Menu path: (Top) → RISCV Options → RISCV Processor Options
config RISCV_HAS_CPU_IDLE
bool "Does SOC has CPU IDLE instruction"
depends on RISCV
help
Does SOC has CPU IDLE instruction
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)