CONFIG_APIC_TSC_DEADLINE_TIMER

Even newer APIC timer using TSC deadline mode

Type: bool

Help

Extremely simple timer driver based the local APIC TSC
deadline capability.  The use of a free-running 64 bit
counter with comparator eliminates almost all edge cases
from the handling, and the near-instruction-cycle resolution
permits effectively unlimited precision where needed (the
limit becomes the CPU time taken to execute the timing
logic). SMP-safe and very fast, this should be the obvious
choice for any x86 device with invariant TSC and TSC
deadline capability.

Direct dependencies

BOARD_UP_SQUARED || X86

(Includes any dependencies from ifs and menus.)

Default

  • y

Symbols selected by this symbol

Kconfig definitions

At <Zephyr>/boards/x86/up_squared/Kconfig.defconfig:14

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:22

Menu path: (Top)

config APIC_TSC_DEADLINE_TIMER
    bool
    default y
    depends on BOARD_UP_SQUARED

At <Zephyr>/drivers/timer/Kconfig:57

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:40<Zephyr>/drivers/Kconfig:28

Menu path: (Top) → Device Drivers → Timer Drivers

config APIC_TSC_DEADLINE_TIMER
    bool "Even newer APIC timer using TSC deadline mode"
    select LOAPIC
    select TICKLESS_CAPABLE
    depends on X86
    help
      Extremely simple timer driver based the local APIC TSC
      deadline capability.  The use of a free-running 64 bit
      counter with comparator eliminates almost all edge cases
      from the handling, and the near-instruction-cycle resolution
      permits effectively unlimited precision where needed (the
      limit becomes the CPU time taken to execute the timing
      logic). SMP-safe and very fast, this should be the obvious
      choice for any x86 device with invariant TSC and TSC
      deadline capability.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)