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CONFIG_CLOCK_STM32_PLL3_R_DIVISOR
¶
PLL3 R Divisor
Type: int
Help¶
PLL3 R Output divisor, allowed values: 1-128.
Direct dependencies¶
CLOCK_STM32_PLL3_R_ENABLE
&& CLOCK_STM32_PLL3_ENABLE
&& SOC_SERIES_STM32H7X
&& !CLOCK_CONTROL_STM32_HAS_DTS
&& !SOC_SERIES_STM32MP1X
&& CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
(Includes any dependencies from ifs and menus.)
Default¶
2
Kconfig definition¶
At <Zephyr>/drivers/clock_control/Kconfig.stm32h7:161
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:153
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control → Enable PLL3 → Enable PLL3 R output
config CLOCK_STM32_PLL3_R_DIVISOR
int "PLL3 R Divisor"
range 1 128
default 2
depends on CLOCK_STM32_PLL3_R_ENABLE && CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
help
PLL3 R Output divisor, allowed values: 1-128.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)