litex,clk

Vendor: LiteX SoC builder

Description

LiteX Mixed Mode Clock Manager
Common clock driver with MMCM unit for dynamic reconfiguration
of up to 7 clock outputs with ability to change frequency, duty
cycle and phase offset

Properties

Node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
#clock-cells	int	Number of cells in a clock specifier; Typically 0 for nodes with a single clock output and 1 for nodes with multiple clock outputs. This property is required. Constant value: 1
clock-output-names	string-array	List of strings of clock output signal names indexed by the first cell in the clock specifier. This property is required.
litex,lock-timeout	int	Number of ms to wait for MMCM to assert LOCK signal This property is required.
litex,drdy-timeout	int	Number of ms to wait for MMCM to assert DRDY signal This property is required.
litex,sys-clock-frequency	int	System clock frequency This property is required.
litex,divclk-divide-min	int	minimal global divider This property is required.
litex,divclk-divide-max	int	maximal global divider This property is required.
litex,clkfbout-mult-min	int	minimal global multiplier This property is required.
litex,clkfbout-mult-max	int	maximal global multiplier This property is required.
litex,vco-freq-min	int	minimal frequency after global divider and multiplier This property is required.
litex,vco-freq-max	int	maximal frequency after global divider and multiplier This property is required.
litex,clkout-divide-min	int	minimal clock output divider This property is required.
litex,clkout-divide-max	int	maximal clock output divider This property is required.
litex,vco-margin	int	tolerancy for vco frequency This property is required.

Specifier cell names

• clock cells: id