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CONFIG_SOC_ATMEL_SAM3X_PLLA_DIVA
¶
(No prompt – not directly user assignable.)
Type: hex
Help¶
This is the divider (DIVA) used by the PLL. The processor clock is (MAINCK * (MULA + 1) / DIVA).
Board config file can override this settings for a particular board.
With default of MULA == 6, and DIVA == 1, PLL is running at 7 times of main clock.
Direct dependencies¶
SOC_SERIES_SAM3X
&& SOC_FAMILY_SAM
(Includes any dependencies from ifs and menus.)
Default¶
0x01
Kconfig definition¶
At <Zephyr>/soc/arm/atmel_sam/sam3x/Kconfig.soc:67
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:28
→ <Zephyr>/soc/Kconfig:11
→ <BuildDir>/Kconfig/Kconfig.soc.arch:2
→ <Zephyr>/soc/arm/atmel_sam/Kconfig:17
Menu path: (Top) → Hardware Configuration
config SOC_ATMEL_SAM3X_PLLA_DIVA hex default 0x01 depends onSOC_SERIES_SAM3X
&&SOC_FAMILY_SAM
help This is the divider (DIVA) used by the PLL. The processor clock is (MAINCK * (MULA + 1) / DIVA). Board config file can override this settings for a particular board. With default of MULA == 6, and DIVA == 1, PLL is running at 7 times of main clock.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)