Help¶

Multiply factor for the audio PLL (PLLI2S) VCO output clock. PLLN factor should be selected to ensure that the VCO output frequency ranges from 100 to 432 MHz. Allowed values: 50-432

Direct dependencies¶

(I2S && BOARD_NUCLEO_F411RE) || (I2S && BOARD_96B_ARGONKEY) || (I2S && BOARD_96B_STM32_SENSOR_MEZ) || (I2S && BOARD_NUCLEO_F411RE) || (I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S)

(Includes any dependencies from ifs and menus.)

Defaults¶

192
192
192
192
56

Kconfig definitions¶

At <Zephyr>/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:37

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:17 → <BuildDir>/Kconfig/Kconfig.shield.defconfig:1 → <Zephyr>/boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5

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config I2S_STM32_PLLI2S_PLLN
    int
    default 192
    depends on I2S && BOARD_NUCLEO_F411RE

At <Zephyr>/boards/arm/96b_argonkey/Kconfig.defconfig:20

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:18

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config I2S_STM32_PLLI2S_PLLN
    int
    default 192
    depends on I2S && BOARD_96B_ARGONKEY

At <Zephyr>/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig:20

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:18

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config I2S_STM32_PLLI2S_PLLN
    int
    default 192
    depends on I2S && BOARD_96B_STM32_SENSOR_MEZ

At <Zephyr>/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:37

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:18 → <Zephyr>/boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5

Menu path: (Top)

config I2S_STM32_PLLI2S_PLLN
    int
    default 192
    depends on I2S && BOARD_NUCLEO_F411RE

At <Zephyr>/drivers/i2s/Kconfig.stm32:42

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:32 → <Zephyr>/drivers/Kconfig:42 → <Zephyr>/drivers/i2s/Kconfig:28

Menu path: (Top) → Device Drivers → I2S bus drivers → STM32 MCU I2S controller driver → Enable usage of PLL

config I2S_STM32_PLLI2S_PLLN
    int "Multiplier factor for PLLI2S VCO output clock"
    range 50 432
    default 56
    depends on I2S_STM32_USE_PLLI2S_ENABLE && I2S_STM32 && I2S
    help
      Multiply factor for the audio PLL (PLLI2S) VCO output clock.
      PLLN factor should be selected to ensure that the VCO
      output frequency ranges from 100 to 432 MHz.
      Allowed values: 50-432

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)