CONFIG_CLOCK_STM32_PLL3_P_ENABLE

Enable PLL3 P output

Type: bool

Help

Enable PLL3 P output.

Direct dependencies

CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL

(Includes any dependencies from ifs and menus.)

Defaults

No defaults. Implicitly defaults to n.

Kconfig definition

At <Zephyr>/drivers/clock_control/Kconfig.stm32h7:130

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:32<Zephyr>/drivers/Kconfig:54<Zephyr>/drivers/clock_control/Kconfig:25<Zephyr>/drivers/clock_control/Kconfig.stm32:133

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control → Enable PLL3

config CLOCK_STM32_PLL3_P_ENABLE
    bool "Enable PLL3 P output"
    depends on CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    help
      Enable PLL3 P output.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)