CONFIG_RISCV_SOC_INTERRUPT_INIT

Enable SOC-based interrupt initialization

Type: bool

Help

Enable SOC-based interrupt initialization (call soc_interrupt_init, within _IntLibInit when enabled)

Direct dependencies

SOC_OPENISA_RV32M1_RISCV32 || SOC_SERIES_RISCV32_MIV || SOC_SERIES_RISCV_SIFIVE_FREEDOM || RISCV

(Includes any dependencies from ifs and menus.)

Defaults

  • y

  • y

  • y

Symbols that select this symbol

Kconfig definitions

At <Zephyr>/soc/riscv/openisa_rv32m1/Kconfig.defconfig:33

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:25<BuildDir>/Kconfig/Kconfig.soc.defconfig:1

Menu path: (Top)

config RISCV_SOC_INTERRUPT_INIT
    bool
    default y
    depends on SOC_OPENISA_RV32M1_RISCV32

At <Zephyr>/soc/riscv/riscv-privilege/miv/Kconfig.defconfig.series:11

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:25<BuildDir>/Kconfig/Kconfig.soc.defconfig:1<Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6

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config RISCV_SOC_INTERRUPT_INIT
    bool
    default y
    depends on SOC_SERIES_RISCV32_MIV

At <Zephyr>/soc/riscv/riscv-privilege/sifive-freedom/Kconfig.defconfig.series:11

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:25<BuildDir>/Kconfig/Kconfig.soc.defconfig:1<Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6

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config RISCV_SOC_INTERRUPT_INIT
    bool
    default y
    depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM

At <Zephyr>/arch/riscv/Kconfig:88

Included via <Zephyr>/Kconfig:8<Zephyr>/Kconfig.zephyr:29<Zephyr>/arch/Kconfig:12

Menu path: (Top) → RISCV Options → RISCV Processor Options

config RISCV_SOC_INTERRUPT_INIT
    bool "Enable SOC-based interrupt initialization"
    depends on RISCV
    help
      Enable SOC-based interrupt initialization
      (call soc_interrupt_init, within _IntLibInit when enabled)

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)