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CONFIG_RISCV_SOC_CONTEXT_SAVE
¶
Enable SOC-based context saving in IRQ handlers
Type: bool
Help¶
Enable low-level SOC-specific context management, for SOCs with extra state that must be saved when entering an interrupt/exception, and restored on exit. If unsure, leave this at the default value.
Enabling this option requires that the SoC provide a soc_context.h header which defines the following macros:
SOC_ESF_MEMBERS: structure component declarations to allocate space for. The last such declaration should not end in a semicolon, for portability. The generic RISC-V architecture code will allocate space for these members in a “struct soc_esf” type (typedefed to soc_esf_t), which will be available if arch.h is included.
SOC_ESF_INIT: structure contents initializer for struct soc_esf state. The last initialized member should not end in a comma.
The generic architecture IRQ wrapper will also call __soc_save_context and __soc_restore_context routines at ISR entry and exit, respectively. These should typically be implemented in assembly. If they were C functions, they would have these signatures:
void __soc_save_context(soc_esf_t *state);
void __soc_restore_context(soc_esf_t *state);
The calls obey standard calling conventions; i.e., the state pointer address is in a0, and ra contains the return address.
Direct dependencies¶
SOC_OPENISA_RV32M1_RISCV32
|| RISCV
(Includes any dependencies from ifs and menus.)
Default¶
Symbols selected by this symbol¶
Kconfig definitions¶
At <Zephyr>/soc/riscv/openisa_rv32m1/Kconfig.defconfig:27
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:25
→ <BuildDir>/Kconfig/Kconfig.soc.defconfig:1
Menu path: (Top)
config RISCV_SOC_CONTEXT_SAVE bool default y ifSOC_OPENISA_RV32M1_RI5CY
depends onSOC_OPENISA_RV32M1_RISCV32
At <Zephyr>/arch/riscv/Kconfig:41
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:29
→ <Zephyr>/arch/Kconfig:12
Menu path: (Top) → RISCV Options → RISCV Processor Options
config RISCV_SOC_CONTEXT_SAVE bool "Enable SOC-based context saving in IRQ handlers" selectRISCV_SOC_OFFSETS
depends onRISCV
help Enable low-level SOC-specific context management, for SOCs with extra state that must be saved when entering an interrupt/exception, and restored on exit. If unsure, leave this at the default value. Enabling this option requires that the SoC provide a soc_context.h header which defines the following macros: - SOC_ESF_MEMBERS: structure component declarations to allocate space for. The last such declaration should not end in a semicolon, for portability. The generic RISC-V architecture code will allocate space for these members in a "struct soc_esf" type (typedefed to soc_esf_t), which will be available if arch.h is included. - SOC_ESF_INIT: structure contents initializer for struct soc_esf state. The last initialized member should not end in a comma. The generic architecture IRQ wrapper will also call __soc_save_context and __soc_restore_context routines at ISR entry and exit, respectively. These should typically be implemented in assembly. If they were C functions, they would have these signatures:void __soc_save_context(soc_esf_t *state);
void __soc_restore_context(soc_esf_t *state);
The calls obey standard calling conventions; i.e., the state pointer address is in a0, and ra contains the return address.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)