Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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ast10x0_reset.h File Reference

Go to the source code of this file.

Macros

#define ASPEED_RESET_GRP_0_OFFSET   (0)
 
#define ASPEED_RESET_GRP_1_OFFSET   (32)
 
#define ASPEED_RESET_HACE   (ASPEED_RESET_GRP_0_OFFSET + 4)
 
#define ASPEED_RESET_USB   (ASPEED_RESET_GRP_0_OFFSET + 3)
 
#define ASPEED_RESET_SRAM   (ASPEED_RESET_GRP_0_OFFSET + 0)
 
#define ASPEED_RESET_UART4   (ASPEED_RESET_GRP_1_OFFSET + 31)
 
#define ASPEED_RESET_UART3   (ASPEED_RESET_GRP_1_OFFSET + 30)
 
#define ASPEED_RESET_UART2   (ASPEED_RESET_GRP_1_OFFSET + 29)
 
#define ASPEED_RESET_UART1   (ASPEED_RESET_GRP_1_OFFSET + 28)
 
#define ASPEED_RESET_JTAG_M0   (ASPEED_RESET_GRP_1_OFFSET + 26)
 
#define ASPEED_RESET_ESPI   (ASPEED_RESET_GRP_1_OFFSET + 25)
 
#define ASPEED_RESET_ADC   (ASPEED_RESET_GRP_1_OFFSET + 23)
 
#define ASPEED_RESET_JTAG_M1   (ASPEED_RESET_GRP_1_OFFSET + 22)
 
#define ASPEED_RESET_MAC   (ASPEED_RESET_GRP_1_OFFSET + 20)
 
#define ASPEED_RESET_I3C3   (ASPEED_RESET_GRP_1_OFFSET + 11)
 
#define ASPEED_RESET_I3C2   (ASPEED_RESET_GRP_1_OFFSET + 10)
 
#define ASPEED_RESET_I3C1   (ASPEED_RESET_GRP_1_OFFSET + 9)
 
#define ASPEED_RESET_I3C0   (ASPEED_RESET_GRP_1_OFFSET + 8)
 
#define ASPEED_RESET_I3C   (ASPEED_RESET_GRP_1_OFFSET + 7)
 
#define ASPEED_RESET_PWM_TACH   (ASPEED_RESET_GRP_1_OFFSET + 5)
 
#define ASPEED_RESET_PECI   (ASPEED_RESET_GRP_1_OFFSET + 4)
 
#define ASPEED_RESET_MII   (ASPEED_RESET_GRP_1_OFFSET + 3)
 
#define ASPEED_RESET_I2C   (ASPEED_RESET_GRP_1_OFFSET + 2)
 
#define ASPEED_RESET_LPC   (ASPEED_RESET_GRP_1_OFFSET + 0)
 

Macro Definition Documentation

◆ ASPEED_RESET_ADC

#define ASPEED_RESET_ADC   (ASPEED_RESET_GRP_1_OFFSET + 23)

◆ ASPEED_RESET_ESPI

#define ASPEED_RESET_ESPI   (ASPEED_RESET_GRP_1_OFFSET + 25)

◆ ASPEED_RESET_GRP_0_OFFSET

#define ASPEED_RESET_GRP_0_OFFSET   (0)

◆ ASPEED_RESET_GRP_1_OFFSET

#define ASPEED_RESET_GRP_1_OFFSET   (32)

◆ ASPEED_RESET_HACE

#define ASPEED_RESET_HACE   (ASPEED_RESET_GRP_0_OFFSET + 4)

◆ ASPEED_RESET_I2C

#define ASPEED_RESET_I2C   (ASPEED_RESET_GRP_1_OFFSET + 2)

◆ ASPEED_RESET_I3C

#define ASPEED_RESET_I3C   (ASPEED_RESET_GRP_1_OFFSET + 7)

◆ ASPEED_RESET_I3C0

#define ASPEED_RESET_I3C0   (ASPEED_RESET_GRP_1_OFFSET + 8)

◆ ASPEED_RESET_I3C1

#define ASPEED_RESET_I3C1   (ASPEED_RESET_GRP_1_OFFSET + 9)

◆ ASPEED_RESET_I3C2

#define ASPEED_RESET_I3C2   (ASPEED_RESET_GRP_1_OFFSET + 10)

◆ ASPEED_RESET_I3C3

#define ASPEED_RESET_I3C3   (ASPEED_RESET_GRP_1_OFFSET + 11)

◆ ASPEED_RESET_JTAG_M0

#define ASPEED_RESET_JTAG_M0   (ASPEED_RESET_GRP_1_OFFSET + 26)

◆ ASPEED_RESET_JTAG_M1

#define ASPEED_RESET_JTAG_M1   (ASPEED_RESET_GRP_1_OFFSET + 22)

◆ ASPEED_RESET_LPC

#define ASPEED_RESET_LPC   (ASPEED_RESET_GRP_1_OFFSET + 0)

◆ ASPEED_RESET_MAC

#define ASPEED_RESET_MAC   (ASPEED_RESET_GRP_1_OFFSET + 20)

◆ ASPEED_RESET_MII

#define ASPEED_RESET_MII   (ASPEED_RESET_GRP_1_OFFSET + 3)

◆ ASPEED_RESET_PECI

#define ASPEED_RESET_PECI   (ASPEED_RESET_GRP_1_OFFSET + 4)

◆ ASPEED_RESET_PWM_TACH

#define ASPEED_RESET_PWM_TACH   (ASPEED_RESET_GRP_1_OFFSET + 5)

◆ ASPEED_RESET_SRAM

#define ASPEED_RESET_SRAM   (ASPEED_RESET_GRP_0_OFFSET + 0)

◆ ASPEED_RESET_UART1

#define ASPEED_RESET_UART1   (ASPEED_RESET_GRP_1_OFFSET + 28)

◆ ASPEED_RESET_UART2

#define ASPEED_RESET_UART2   (ASPEED_RESET_GRP_1_OFFSET + 29)

◆ ASPEED_RESET_UART3

#define ASPEED_RESET_UART3   (ASPEED_RESET_GRP_1_OFFSET + 30)

◆ ASPEED_RESET_UART4

#define ASPEED_RESET_UART4   (ASPEED_RESET_GRP_1_OFFSET + 31)

◆ ASPEED_RESET_USB

#define ASPEED_RESET_USB   (ASPEED_RESET_GRP_0_OFFSET + 3)