Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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irq.h File Reference

RISC-V public interrupt handling. More...

#include <zephyr/irq.h>
#include <zephyr/sw_isr_table.h>
#include <stdbool.h>

Go to the source code of this file.

Macros

#define RISCV_EXC_ECALLU   8
 
#define RISCV_EXC_ECALLM   11
 Environment Call from M-mode.
 
#define RISCV_IRQ_MSOFT   3
 Machine Software Interrupt.
 
#define RISCV_IRQ_MEXT   11
 Machine External Interrupt.
 
#define RISCV_MCAUSE_IRQ_POS   31U
 
#define RISCV_MCAUSE_IRQ_BIT   BIT(RISCV_MCAUSE_IRQ_POS)
 
#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p)
 
#define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p)
 
#define ARCH_ISR_DIRECT_HEADER()   arch_isr_direct_header()
 
#define ARCH_ISR_DIRECT_FOOTER(swap)   arch_isr_direct_footer(swap)
 
#define ARCH_ISR_DIRECT_DECLARE(name)
 

Functions

void arch_irq_enable (unsigned int irq)
 
void arch_irq_disable (unsigned int irq)
 
int arch_irq_is_enabled (unsigned int irq)
 
static void arch_isr_direct_header (void)
 
static void arch_isr_direct_footer (int swap)
 

Detailed Description

RISC-V public interrupt handling.

RISC-V-specific kernel interrupt handling interface.

Macro Definition Documentation

◆ ARCH_IRQ_CONNECT

#define ARCH_IRQ_CONNECT (   irq_p,
  priority_p,
  isr_p,
  isr_param_p,
  flags_p 
)
Value:
{ \
Z_ISR_DECLARE(irq_p + CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET, \
0, isr_p, isr_param_p); \
z_riscv_irq_priority_set(irq_p, priority_p, flags_p); \
}

◆ ARCH_IRQ_DIRECT_CONNECT

#define ARCH_IRQ_DIRECT_CONNECT (   irq_p,
  priority_p,
  isr_p,
  flags_p 
)
Value:
{ \
Z_ISR_DECLARE_DIRECT(irq_p + CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET, \
ISR_FLAG_DIRECT, isr_p); \
z_riscv_irq_priority_set(irq_p, priority_p, flags_p); \
}
#define ISR_FLAG_DIRECT
This interrupt gets put directly in the vector table.
Definition: sw_isr_table.h:105

◆ ARCH_ISR_DIRECT_DECLARE

#define ARCH_ISR_DIRECT_DECLARE (   name)
Value:
static inline int name##_body(void); \
__attribute__ ((interrupt)) void name(void) \
{ \
ISR_DIRECT_HEADER(); \
name##_body(); \
ISR_DIRECT_FOOTER(0); \
} \
static inline int name##_body(void)

◆ ARCH_ISR_DIRECT_FOOTER

#define ARCH_ISR_DIRECT_FOOTER (   swap)    arch_isr_direct_footer(swap)

◆ ARCH_ISR_DIRECT_HEADER

#define ARCH_ISR_DIRECT_HEADER ( )    arch_isr_direct_header()

◆ RISCV_EXC_ECALLM

#define RISCV_EXC_ECALLM   11

Environment Call from M-mode.

◆ RISCV_EXC_ECALLU

#define RISCV_EXC_ECALLU   8

◆ RISCV_IRQ_MEXT

#define RISCV_IRQ_MEXT   11

Machine External Interrupt.

◆ RISCV_IRQ_MSOFT

#define RISCV_IRQ_MSOFT   3

Machine Software Interrupt.

◆ RISCV_MCAUSE_IRQ_BIT

#define RISCV_MCAUSE_IRQ_BIT   BIT(RISCV_MCAUSE_IRQ_POS)

◆ RISCV_MCAUSE_IRQ_POS

#define RISCV_MCAUSE_IRQ_POS   31U

Function Documentation

◆ arch_irq_disable()

void arch_irq_disable ( unsigned int  irq)

◆ arch_irq_enable()

void arch_irq_enable ( unsigned int  irq)

◆ arch_irq_is_enabled()

int arch_irq_is_enabled ( unsigned int  irq)

◆ arch_isr_direct_footer()

static void arch_isr_direct_footer ( int  swap)
inlinestatic

◆ arch_isr_direct_header()

static void arch_isr_direct_header ( void  )
inlinestatic