nrfxlib API 0.1.0
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phy_rf_params.h File Reference
#include "pack_def.h"

Go to the source code of this file.

Data Structures

struct  nrf_wifi_xo_freq_offset
 
struct  nrf_wifi_pd_adst_val
 
struct  nrf_wifi_tx_pwr_systm_offset
 
struct  nrf_wifi_tx_pwr_ceil
 
struct  nrf_wifi_rx_gain_offset
 
struct  nrf_wifi_temp_volt_depend_params
 
struct  nrf_wifi_phy_rf_params
 
struct  nrf_wifi_tx_pwr_ceil_params
 This structure defines the parameters used to control the max transmit (TX) power in both frequency bands for different data rates. More...
 

Macros

#define NRF_WIFI_RF_PARAMS_SIZE   200
 PHY init config parameters. These are passed to phy at init.
 
#define NRF_WIFI_RF_PARAMS_CONF_SIZE   42
 
#define NUM_PCB_LOSS_OFFSET   4
 
#define NRF_WIFI_DEF_RF_PARAMS   "007077003F032424001000002800323500000CF008087D8105010071630300EED501001F6F00003B350100F52E0000E35E0000B7B6000066EFFEFFB5F60000896200007A840200E28FFCFF080808080408120100000000A1A10178000000080050003B020726181818181A120A140E0600"
 
#define NRF_WIFI_PHY_CALIB_FLAG_RXDC   1
 
#define NRF_WIFI_PHY_CALIB_FLAG_TXDC   2
 
#define NRF_WIFI_PHY_CALIB_FLAG_TXPOW   0
 
#define NRF_WIFI_PHY_CALIB_FLAG_TXIQ   8
 
#define NRF_WIFI_PHY_CALIB_FLAG_RXIQ   16
 
#define NRF_WIFI_PHY_CALIB_FLAG_DPD   32
 
#define NRF_WIFI_PHY_CALIB_FLAG_ENHANCED_TXDC   64
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_RXDC   (1<<16)
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_TXDC   (2<<16)
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_TXPOW   (0<<16)
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_TXIQ   (0<<16)
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_RXIQ   (0<<16)
 
#define NRF_WIFI_PHY_SCAN_CALIB_FLAG_DPD   (0<<16)
 
#define NRF_WIFI_DEF_PHY_CALIB
 
#define NRF_WIFI_DEF_PHY_TEMP_CALIB
 
#define NRF_WIFI_TEMP_CALIB_PERIOD   (1024 * 1024) /* micro seconds */
 
#define NRF_WIFI_TEMP_CALIB_THRESHOLD   (40)
 
#define NRF_WIFI_TEMP_CALIB_ENABLE   1
 
#define NRF_WIFI_DEF_PHY_VBAT_CALIB   (NRF_WIFI_PHY_CALIB_FLAG_DPD)
 
#define NRF_WIFI_VBAT_VERYLOW   (8) /* Corresponds to (2.5+8*0.07)=3.06V */
 
#define NRF_WIFI_VBAT_LOW   (12) /* Correspond to (2.5+12*0.07)=3.34V */
 
#define NRF_WIFI_VBAT_HIGH   (14) /* Correspond to (2.5+14*0.07)=3.48V */
 
#define QFN_PACKAGE_INFO   0x5146
 
#define CSP_PACKAGE_INFO   0x4345
 
#define PD_ADJUST_VAL   0
 
#define RX_GAIN_OFFSET_LB_CHAN   0
 
#define RX_GAIN_OFFSET_HB_LOW_CHAN   0
 
#define RX_GAIN_OFFSET_HB_MID_CHAN   0
 
#define RX_GAIN_OFFSET_HB_HIGH_CHAN   0
 
#define SYSTEM_OFFSET_LB   3
 
#define SYSTEM_OFFSET_HB_CHAN_LOW   3
 
#define SYSTEM_OFFSET_HB_CHAN_MID   3
 
#define SYSTEM_OFFSET_HB_CHAN_HIGH   3
 
#define QFN_XO_VAL   0x2A
 
#define QFN_MAX_TX_PWR_DSSS   0x54
 
#define QFN_MAX_TX_PWR_LB_MCS7   0x40
 
#define QFN_MAX_TX_PWR_LB_MCS0   0x40
 
#define QFN_MAX_TX_PWR_HB_LOW_CHAN_MCS7   0x34
 
#define QFN_MAX_TX_PWR_HB_MID_CHAN_MCS7   0x34
 
#define QFN_MAX_TX_PWR_HB_HIGH_CHAN_MCS7   0x30
 
#define QFN_MAX_TX_PWR_HB_LOW_CHAN_MCS0   0x38
 
#define QFN_MAX_TX_PWR_HB_MID_CHAN_MCS0   0x34
 
#define QFN_MAX_TX_PWR_HB_HIGH_CHAN_MCS0   0x30
 
#define QFN_MAX_CHIP_TEMP   0x43
 
#define QFN_MIN_CHIP_TEMP   0x07
 
#define QFN_LB_MAX_PWR_BKF_HI_TEMP   0xFC
 
#define QFN_LB_MAX_PWR_BKF_LOW_TEMP   0x00
 
#define QFN_HB_MAX_PWR_BKF_HI_TEMP   0xF8
 
#define QFN_HB_MAX_PWR_BKF_LOW_TEMP   0xFC
 
#define QFN_LB_VBT_LT_VLOW   0xFC
 
#define QFN_HB_VBT_LT_VLOW   0xF8
 
#define QFN_LB_VBT_LT_LOW   0x00
 
#define QFN_HB_VBT_LT_LOW   0xFC
 
#define CSP_XO_VAL   0x2A
 
#define CSP_MAX_TX_PWR_DSSS   0x48
 
#define CSP_MAX_TX_PWR_LB_MCS7   0x44
 
#define CSP_MAX_TX_PWR_LB_MCS0   0x44
 
#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS7   0x3C
 
#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS7   0x3C
 
#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS7   0x3C
 
#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS0   0x3C
 
#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS0   0x3C
 
#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS0   0x3C
 
#define CSP_MAX_CHIP_TEMP   0x43
 
#define CSP_MIN_CHIP_TEMP   0x07
 
#define CSP_LB_MAX_PWR_BKF_HI_TEMP   0xEC
 
#define CSP_LB_MAX_PWR_BKF_LOW_TEMP   0x00
 
#define CSP_HB_MAX_PWR_BKF_HI_TEMP   0xFC
 
#define CSP_HB_MAX_PWR_BKF_LOW_TEMP   0xF4
 
#define CSP_LB_VBT_LT_VLOW   0xFC
 
#define CSP_HB_VBT_LT_VLOW   0xEC
 
#define CSP_LB_VBT_LT_LOW   0x00
 
#define CSP_HB_VBT_LT_LOW   0xF8
 
#define FT_PROG_VER1_2G_DSSS_TXCEIL_BKOFF   0
 
#define FT_PROG_VER1_2G_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER1_5G_LOW_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER1_5G_MID_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER1_5G_HIGH_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER2_2G_DSSS_TXCEIL_BKOFF   0
 
#define FT_PROG_VER2_2G_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER2_5G_LOW_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER2_5G_MID_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER2_5G_HIGH_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER3_2G_DSSS_TXCEIL_BKOFF   0
 
#define FT_PROG_VER3_2G_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER3_5G_LOW_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER3_5G_MID_OFDM_TXCEIL_BKOFF   0
 
#define FT_PROG_VER3_5G_HIGH_OFDM_TXCEIL_BKOFF   0
 

Enumerations

enum  RF_PARAMS_OFFSETS {
  NRF_WIFI_XO_FREQ_BYTE_OFFSET = 6 , NRF_WIFI_PD_ADST_VAL_BYTE_OFFSET = 7 , NRF_WIFI_TX_PWR_SYSTM_BYTE_OFFSET = 11 , NRF_WIFI_TX_PWR_CEIL_BYTE_OFFSET = 15 ,
  NRF_WIFI_RX_GAIN_BYTE_OFFSET = 24 , NRF_WIFI_VT_DEPEND_PARAMS_BYTE_OFFSET = 28
}
 
enum  MAX_POWER_OFFSETS {
  NRF_WIFI_MAX_OP_PWR_DSSS_OFST , NRF_WIFI_MAX_OP_PWR_2PT4GHZ_OFDM_MCS7 , NRF_WIFI_MAX_OP_PWR_2PT4GHZ_OFDM_MCS0 , NRF_WIFI_MAX_OP_PWR_5GHZ_LB_MCS7 ,
  NRF_WIFI_MAX_OP_PWR_5GHZ_MID_MCS7 , NRF_WIFI_MAX_OP_PWR_5GHZ_HI_MCS7 , NRF_WIFI_MAX_OP_PWR_5GHZ_LB_MCS0 , NRF_WIFI_MAX_OP_PWR_5GHZ_MID_MCS0 ,
  NRF_WIFI_MAX_OP_PWR_5GHZ_HI_MCS0
}
 
enum  PCB_LOSS_BYTE_OFFSETS { PCB_LOSS_BYTE_2G_OFST = 185 , PCB_LOSS_BYTE_5G_BAND1_OFST , PCB_LOSS_BYTE_5G_BAND2_OFST , PCB_LOSS_BYTE_5G_BAND3_OFST }
 
enum  ANT_GAIN_OFFSETS {
  ANT_GAIN_2G_OFST = 181 , ANT_GAIN_5G_BAND1_OFST , ANT_GAIN_5G_BAND2_OFST , ANT_GAIN_5G_BAND3_OFST ,
  NUM_ANT_GAIN = 4
}
 
enum  EDGE_BACKOFF_OFFSETS {
  BAND_2G_LW_ED_BKF_DSSS_OFST = 155 , BAND_2G_LW_ED_BKF_HT_OFST , BAND_2G_LW_ED_BKF_HE_OFST , BAND_2G_UW_ED_BKF_DSSS_OFST ,
  BAND_2G_UW_ED_BKF_HT_OFST , BAND_2G_UW_ED_BKF_HE_OFST , BAND_UNII_1_LW_ED_BKF_HT_OFST , BAND_UNII_1_LW_ED_BKF_HE_OFST ,
  BAND_UNII_1_UW_ED_BKF_HT_OFST , BAND_UNII_1_UW_ED_BKF_HE_OFST , BAND_UNII_2A_LW_ED_BKF_HT_OFST , BAND_UNII_2A_LW_ED_BKF_HE_OFST ,
  BAND_UNII_2A_UW_ED_BKF_HT_OFST , BAND_UNII_2A_UW_ED_BKF_HE_OFST , BAND_UNII_2C_LW_ED_BKF_HT_OFST , BAND_UNII_2C_LW_ED_BKF_HE_OFST ,
  BAND_UNII_2C_UW_ED_BKF_HT_OFST , BAND_UNII_2C_UW_ED_BKF_HE_OFST , BAND_UNII_3_LW_ED_BKF_HT_OFST , BAND_UNII_3_LW_ED_BKF_HE_OFST ,
  BAND_UNII_3_UW_ED_BKF_HT_OFST , BAND_UNII_3_UW_ED_BKF_HE_OFST , BAND_UNII_4_LW_ED_BKF_HT_OFST , BAND_UNII_4_LW_ED_BKF_HE_OFST ,
  BAND_UNII_4_UW_ED_BKF_HT_OFST , BAND_UNII_4_UW_ED_BKF_HE_OFST , NUM_EDGE_BACKOFF = 26
}
 
enum  ft_prog_ver { FT_PROG_VER1 = 1 , FT_PROG_VER2 = 2 , FT_PROG_VER3 = 3 }