nRF51 SDK - S110 SoftDevice
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Software controlled TWI Master driver. More...
Macros | |
#define | TWI_READ_BIT (0x01) |
If this bit is set in the address field, transfer direction is from slave to master. | |
#define | TWI_ISSUE_STOP ((bool)true) |
Parameter for twi_master_transfer. | |
#define | TWI_DONT_ISSUE_STOP ((bool)false) |
Parameter for twi_master_transfer. | |
#define | TWI_SCL_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
#define | TWI_SCL_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
#define | TWI_SDA_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
#define | TWI_SDA_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
#define | TWI_SDA_INPUT() do { NRF_GPIO->DIRCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
#define | TWI_SDA_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
#define | TWI_SCL_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
#define | TWI_SDA_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_DATA_PIN_NUMBER) & 0x1UL) |
#define | TWI_SCL_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) |
#define | TWI_DELAY() nrf_delay_us(4) |
Functions | |
bool | twi_master_init (void) |
Function for initializing TWI bus IO pins and checks if the bus is operational. More... | |
bool | twi_master_transfer (uint8_t address, uint8_t *data, uint8_t data_length, bool issue_stop_condition) |
Function for transferring data over TWI bus. More... | |
Software controlled TWI Master driver.
Supported features:
#define TWI_DELAY | ( | ) | nrf_delay_us(4) |
Time to wait when pin states are changed. For fast-mode the delay can be zero and for standard-mode 4 us delay is sufficient.
#define TWI_SCL_HIGH | ( | ) | do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
Pulls SCL line high
#define TWI_SCL_LOW | ( | ) | do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
Pulls SCL line low
#define TWI_SCL_OUTPUT | ( | ) | do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) |
Configures SCL pin as output
#define TWI_SCL_READ | ( | ) | ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) |
Reads current state of SCL
#define TWI_SDA_HIGH | ( | ) | do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
Pulls SDA line high
#define TWI_SDA_INPUT | ( | ) | do { NRF_GPIO->DIRCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
Configures SDA pin as input
#define TWI_SDA_LOW | ( | ) | do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
Pulls SDA line low
#define TWI_SDA_OUTPUT | ( | ) | do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) |
Configures SDA pin as output
#define TWI_SDA_READ | ( | ) | ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_DATA_PIN_NUMBER) & 0x1UL) |
Reads current state of SDA
bool twi_master_init | ( | void | ) |
Function for initializing TWI bus IO pins and checks if the bus is operational.
Both pins are configured as Standard-0, No-drive-1 (open drain).
true | TWI bus is clear for transfers. |
false | TWI bus is stuck. |
bool twi_master_transfer | ( | uint8_t | address, |
uint8_t * | data, | ||
uint8_t | data_length, | ||
bool | issue_stop_condition | ||
) |
Function for transferring data over TWI bus.
If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued and the function returns false. Bit 0 (TWI_READ_BIT) in the address parameter controls transfer direction;
address | Data transfer direction (LSB) / Slave address (7 MSBs). |
data | Pointer to data. |
data_length | Number of bytes to transfer. |
issue_stop_condition | If TWI_ISSUE_STOP, STOP condition is issued before exiting function. If TWI_DONT_ISSUE_STOP, STOP condition is not issued before exiting function. If transfer failed for any reason, STOP condition will be issued in any case. |
true | Data transfer succeeded without errors. |
false | Data transfer failed. |