-
CONFIG_MCG_FRDIV
¶
FLL external reference divider
Type: int
Help¶
Selects the amount to divide down the external reference clock for the
FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
kHz.
Direct dependencies¶
BOARD_FRDM_KL25Z
|| BOARD_FRDM_KW41Z
|| BOARD_HEXIWEAR_KW40Z
|| (HAS_MCG
&& SOC_FAMILY_KINETIS
)
(Includes any dependencies from ifs and menus.)
Defaults¶
5
5
5
0
Kconfig definitions¶
At <Zephyr>/boards/arm/frdm_kl25z/Kconfig.defconfig:20
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:18
Menu path: (Top)
config MCG_FRDIV
int
default 5
depends on BOARD_FRDM_KL25Z
At <Zephyr>/boards/arm/frdm_kw41z/Kconfig.defconfig:14
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:18
Menu path: (Top)
config MCG_FRDIV
int
default 5
depends on BOARD_FRDM_KW41Z
At <Zephyr>/boards/arm/hexiwear_kw40z/Kconfig.defconfig:14
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:18
Menu path: (Top)
config MCG_FRDIV
int
default 5
depends on BOARD_HEXIWEAR_KW40Z
At <Zephyr>/soc/arm/nxp_kinetis/Kconfig:94
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:28
→ <Zephyr>/soc/Kconfig:11
→ <BuildDir>/kconfig/Kconfig.soc.arch:2
Menu path: (Top) → Hardware Configuration
config MCG_FRDIV
int "FLL external reference divider"
range 0 7
default 0
depends on HAS_MCG && SOC_FAMILY_KINETIS
help
Selects the amount to divide down the external reference clock for the
FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
kHz.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)