Help¶

D1 Domain, CPU1 clock (sys_d1cpre_ck prescaler),
allowed values: 1, 2, 4, 8, 16, 64, 128, 256, 512.

Direct dependencies¶

SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL

(Includes any dependencies from ifs and menus.)

Default¶

1

Kconfig definition¶

At <Zephyr>/drivers/clock_control/Kconfig.stm32h7:21

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:32 → <Zephyr>/drivers/Kconfig:54 → <Zephyr>/drivers/clock_control/Kconfig:25 → <Zephyr>/drivers/clock_control/Kconfig.stm32:153

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_D1CPRE
    int "D1 Domain, CPU1 clock prescaler"
    range 1 512
    default 1
    depends on SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    help
      D1 Domain, CPU1 clock (sys_d1cpre_ck prescaler),
      allowed values: 1, 2, 4, 8, 16, 64, 128, 256, 512.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)