ti,k3-pinctrl

Vendor: Texas Instruments

Description

TI K3 pinctrl node.

Pins can be configured using the following macro "K3_PINMUX(offset, value, mux_mode)".
offset - the pin attribute register offset from the base address.
value - one of the following:
  PIN_OUTPUT
  PIN_OUTPUT_PULLUP
  PIN_OUTPUT_PULLDOWN
  PIN_INPUT
  PIN_INPUT_PULLUP
  PIN_INPUT_PULLDOWN
mux_mode - The mux mode for the pin, MUX_MODE_0 -> MUX_MODE_9.
e.g. for AM62x the pinctrl base address is 0xf4000.
     The default UART0_RX pin is located at 0x000f41c8 (mux mode 0).
     So the configuration would be "K3_PINMUX(0x1c8, PIN_INPUT, MUX_MODE_0)".

Properties

Top level properties

These property descriptions apply to “ti,k3-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Child node properties

Name

Type

Details

pinmux

array

TI K3 pin configuration.

This property is required.