quicklogic,eos-s3-pinctrl
Vendor: QuickLogic Corp.
Description
Quicklogic EOS S3 IO MUX binding covers the 46 IOMUX_PAD_x_CTRL registers
that can be used to set the direction and the function of a pad.
Device pin configuration should be placed in the child nodes of this node.
Populate the 'pinmux' field with IO function and pin number.
For example, setting pins 44 and 45 for use as UART would look like this:
#include <dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
&pinctrl {
uart0_rx_default: uart0_rx_default {
pinmux = <UART_RX_PAD45>;
input-enable;
};
uart0_tx_default: uart0_tx_default {
pinmux = <UART_TX_PAD44>;
output-enable;
};
};
Properties
Top level properties
These property descriptions apply to “quicklogic,eos-s3-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
(None)
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “quicklogic,eos-s3-pinctrl” compatible.
Name |
Type |
Details |
|---|---|---|
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register space
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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Child node properties
Name |
Type |
Details |
|---|---|---|
|
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Quicklogic EOS S3 pin's configuration (pin, IO function).
This property is required. |
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The default value "slow" matches the power-on reset value.
Default value: Legal values: |
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Control selection for IO output.
It's either controlled from registers of the A0 always-on domain,
fabric-controlled for signaling with FPGA,
or other-controller for bidirectional signals.
The default value "a0registers" matches the power-on reset value.
Default value: Legal values: |
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high impedance mode ("third-state", "floating")
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enable pull-up resistor
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enable pull-down resistor
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maximum sink or source current in mA
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enable input on pin (e.g. enable an input buffer, no effect on output)
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enable schmitt-trigger mode
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enable output on a pin without actively driving it (e.g. enable an output
buffer)
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