st,stm32-mipi-dsi

Vendor: STMicroelectronics

Description

These nodes are “mipi-dsi” bus nodes.

STM32 MIPI DSI host

Properties

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
resets	phandle-array	Reset information This property is required.
hs-active-high	boolean	DSI host horizontal synchronization is active high.
vs-active-high	boolean	DSI host vertical synchronization is active high.
de-active-high	boolean	DSI host data enable is active high.
loosely-packed	boolean	Enable or disable loosely packed stream (needed only when using 18-bit configuration).
largest-packet-size	int	The size, in bytes, of the low power largest packet that can fit in a line during VSA, VBP, VFP and VACT regions
bta-ack-disable	boolean	Disable frame bus-turn-around acknowledge enable
non-continuous	boolean	DSI host enable non continuous clock.
pll-ndiv	int	DSI host dedicated PLL loop division factor. This property is required.
pll-idf	int	DSI host dedicated PLL input division factor. This property is required.
pll-odf	int	DSI HOST dedicated PLL output division factor. This property is required.
active-errors	int	Indicates which error interrupts will be enabled. This parameter can be any combination of DSI_Error_Data_Type and defaults to HAL_DSI_ERROR_NONE.
lp-rx-filter	int	Use Low-Power Reception Filter. Cutoff frequency of low-pass filter at the input of LPRX. Defaults to 0 which disables the filter.
host-timeouts	array	DSI HOST timeout parameters.
phy-timings	array	DSI HOST PHY timing parameters.
test-pattern	int	Show DSI host color bars, select color bar orientation 0 : Vertical color bars 1 : Horizontal color bars Legal values: 0, 1
phy-clock	int	MIPI PHY clock frequency. Should be set to ensure clock frequency is at least (pixel clock * bits per output pixel) / number of mipi data lanes
reset-names	string-array	Name of each reset