nxp,mcux-i2s

Vendor: NXP Semiconductors

Description

These nodes are “i2s” bus nodes.

NXP mcux SAI-I2S controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

nxp,tx-dma-channel

int

tx dma channel number

This property is required.

nxp,rx-dma-channel

int

rx dma channel number

This property is required.

nxp,tx-sync-mode

boolean

tx sync mode

nxp,rx-sync-mode

boolean

rx sync mode

pre-div

int

pre divider

podf

int

post-divider fraction

pll-clocks

phandle-array

pll settings

pll-clock-names

string-array

Provided names of pll-clock specifiers

pinmuxes

phandle-array

iomux settings

nxp,tx-channel

int

tx channel the maximum number is SOC dependent

clock-mux

int

Clock mux source for SAI root clock

This property is required.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.