nxp,mcux-edma
Vendor: NXP Semiconductors
Description
These nodes are “dma” bus nodes.
NXP MCUX EDMA controller
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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Number of DMA channels supported by the controller
This property is required. |
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Number of DMA request signals supported by the controller.
This property is required. |
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The offset value for obtaining DMAMUX register index from DMAMUX channel. Default value means DMAMUX channel is identical with DMAMUX register index
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On some platforms, there may be a gap in the channels and
this array specifies the start and end of a single gap
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If the DMA controller supports memory to memory transfer
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If the DMA controller supports always on
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Describes an offset between two channels share the same interrupt entry.
Default value means each channel has separate interrupt entry.
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Number of items to expect in a DMAMUX specifier
This property is required. |
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Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.
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Memory address alignment requirement for DMA buffers used by the controller.
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Memory size alignment requirement for DMA buffers used by the controller.
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Minimal chunk of data possible to be copied by the controller.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,mcux-edma” compatible.
Name |
Type |
Details |
|---|---|---|
|
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Specifies base physical address(s) and size of DMA and respective DMAMUX register(s)
that routes DMA sources
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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Specifier cell names
dma cells: mux, source