:orphan:
.. raw:: html
.. dtcompatible:: microchip,xec-qmspi-ldma
.. _dtbinding_microchip_xec_qmspi_ldma:
microchip,xec-qmspi-ldma
########################
Vendor: :ref:`Microchip Technology Inc. `
Description
***********
These nodes are "spi" bus nodes.
.. code-block:: none
Microchip XEC QMSPI controller with local DMA
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``girqs``
- ``array``
- .. code-block:: none
An array of integers encoding each interrupt signal connection.
This information includes the aggregated GIRQ number, GIRQ bit
position, aggregated GIRQ NVIC connection, and direct NVIC
connection of the GIRQ bit.
This property is **required**.
* - ``pinctrl-0``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
This property is **required**.
* - ``pinctrl-names``
- ``string-array``
- .. code-block:: none
Names for the provided states. The number of names needs to match the
number of states.
This property is **required**.
* - ``lines``
- ``int``
- .. code-block:: none
QMSPI data lines 1, 2, or 4. 1 data line is full-duplex
MOSI and MISO or half-duplex on MOSI only. Lines set to 2
or 4 indicate dual or quad I/O modes.
Defaults to 1 for full duplex driver's support for full-duplex spi.
Legal values: ``1``, ``2``, ``4``
* - ``chip-select``
- ``int``
- .. code-block:: none
Use QMSPI CS0# or CS1#. Port 0 supports both chip selects.
Ports 1 and 2 implement CS0# only. Defaults to CS0#.
* - ``dcsckon``
- ``int``
- .. code-block:: none
Delay in QMSPI main clocks from CS# assertion to first clock edge.
If not present use hardware default value. Refer to chip documentation
for QMSPI input clock frequency.
* - ``dckcsoff``
- ``int``
- .. code-block:: none
Delay in QMSPI main clocks from last clock edge to CS# de-assertion.
If not present use hardware default value. Refer to chip documentation
for QMSPI input clock frequency.
* - ``dldh``
- ``int``
- .. code-block:: none
Delay in QMSPI main clocks from CS# de-assertion to driving HOLD#
and WP#. If not present use hardware default value. Refer to chip
documentation for QMSPI input clock frequency.
* - ``dcsda``
- ``int``
- .. code-block:: none
Delay in QMSPI main clocks from CS# de-assertion to CS# assertion.
If not present use hardware default value. Refer to chip documentation
for QMSPI input clock frequency.
* - ``cs1-freq``
- ``int``
- .. code-block:: none
Allows different frequencies for CS#0 and CS1# devices. This applies
to ports implementing CS1#.
* - ``tctradj``
- ``int``
- .. code-block:: none
An optional signed 8-bit value for adjusting the QMSPI control signal
timing tap.
* - ``tsckadj``
- ``int``
- .. code-block:: none
An optional signed 8-bit value for adjusting the QMSPI clock signal
timing tap.
* - ``clock-frequency``
- ``int``
- .. code-block:: none
Clock frequency the SPI peripheral is being driven at, in Hz.
* - ``cs-gpios``
- ``phandle-array``
- .. code-block:: none
An array of chip select GPIOs to use. Each element
in the array specifies a GPIO. The index in the array
corresponds to the child node that the CS gpio controls.
Example:
spi@... {
cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>,
...;
spi-device@0 {
reg = <0>;
...
};
spi-device@1 {
reg = <1>;
...
};
...
};
The child node "spi-device@0" specifies a SPI device with
chip select controller gpio0, pin 23, and devicetree
GPIO flags GPIO_ACTIVE_LOW. Similarly, "spi-device@1" has CS GPIO
controller gpio1, pin 10, and flags GPIO_ACTIVE_LOW. Additional
devices can be configured in the same way.
If unsure about the flags cell, GPIO_ACTIVE_LOW is generally a safe
choice for a typical "CSn" pin. GPIO_ACTIVE_HIGH may be used if
intervening hardware inverts the signal to the peripheral device or
the line itself is active high.
If this property is not defined, no chip select GPIOs are set.
SPI controllers with dedicated CS pins do not need to define
the cs-gpios property.
* - ``pinctrl-1``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the second state. See pinctrl-0.
* - ``pinctrl-2``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the third state. See pinctrl-0.
* - ``pinctrl-3``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the fourth state. See pinctrl-0.
* - ``pinctrl-4``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the fifth state. See pinctrl-0.
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "microchip,xec-qmspi-ldma" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``reg``
- ``array``
- .. code-block:: none
register space
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Clock gate information
This property is **required**.
* - ``interrupts``
- ``array``
- .. code-block:: none
interrupts for device
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``#address-cells``
- ``int``
- .. code-block:: none
number of address cells in reg property
This property is **required**.
Constant value: ``1``
* - ``#size-cells``
- ``int``
- .. code-block:: none
number of size cells in reg property
This property is **required**.
* - ``status``
- ``string``
- .. code-block:: none
indicates the operational status of a device
Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'``
See :ref:`dt-important-props` for more information.
* - ``compatible``
- ``string-array``
- .. code-block:: none
compatible strings
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
- .. code-block:: none
name of each register space
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
extended interrupt specifier for device
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
name of each interrupt
* - ``interrupt-parent``
- ``phandle``
- .. code-block:: none
phandle to interrupt controller node
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device (used as device_get_binding() argument)
See :ref:`dt-important-props` for more information.
This property is **deprecated**.
* - ``clock-names``
- ``string-array``
- .. code-block:: none
name of each clock
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channels specifiers
* - ``dma-names``
- ``string-array``
- .. code-block:: none
Provided names of DMA channel specifiers
* - ``io-channels``
- ``phandle-array``
- .. code-block:: none
IO channels specifiers
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Provided names of IO channel specifiers
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
mailbox / IPM channels specifiers
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Provided names of mailbox / IPM channel specifiers
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``power-domain``
- ``phandle``
- .. code-block:: none
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.