:orphan:
.. raw:: html
.. dtcompatible:: st,stm32-rcc
.. _dtbinding_st_stm32_rcc:
st,stm32-rcc
############
Vendor: :ref:`STMicroelectronics `
Description
***********
.. code-block:: none
STM32 Reset and Clock controller node.
This node is in charge of system clock ('SYSCLK') source selection and controlling
clocks for AHB (Advanced High Performance) and APB (Advanced Peripheral) bus domains.
Configuring STM32 Reset and Clock controller node:
System clock source should be selected amongst the clock nodes available in "clocks"
node (typically 'clk_hse, clk_hsi', 'pll', ...).
Core clock frequency should also be defined, using "clock-frequency" property.
Note:
Core clock frequency = SYSCLK / AHB prescaler
Last, peripheral bus clocks (typically PCLK1, PCLK2) should be configured using matching
prescaler properties.
Here is an example of correctly configured rcc node:
&rcc {
clocks = <&pll>; /* Select 80MHz pll as SYSCLK source */
ahb-prescaler = <2>;
clock-frequency = ; /* = SYSCLK / AHB prescaler */
apb1-presacler = <1>;
apb2-presacler = <1>;
}
Specifying a gated clock:
To specify a gated clock, a peripheral should define a "clocks" property encoded
in the following way:
... {
...
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
...
}
After the phandle referring to rcc node, the first index specifies the registers of
the bus controlling the peripheral and the second index specifies the bit used to
control the peripheral clock in that bus register.
The gated clock is required when accessing to the peripheral controller is needed
(generally for configuring the device). If dual clock domain is not used, it is
also used for peripheral operation.
Specifying a domain clock source:
Specifying a domain source clock could be done by adding a clock specifier to the
clock property:
... {
...
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>,
<&rcc STM32_SRC_HSI I2C1_SEL(2)>;
...
}
In this example, I2C1 device is assigned HSI as domain clock source.
Domain clock is independent from the bus/gated clock and allows access to the device's
register while the gated clock is off. As it doesn't feed the peripheral's controller, it
allows peripheral operation, but can't be used for peripheral configuration.
It is peripheral driver's responsibility to query and use clock source information in
accordance with clock_control API specifications.
Since the peripheral subsystem rate is dictated by the clock used for peripheral
operation, same clock should be used in calls to `clock_control_get_rate()`
Note 1: No additional specifier means gating clock is also the clock source (ie
'PCLK/PCLK1/PCLK2' depending on the device). There is no need to add a second
cell to explicitly set it.
Note 2: Default peripheral clock configuration (ie the one provided in *.dsti files)
should be the one matching SoC reset state. Confere reference manual to check
what is the reset value of the clock source for each peripheral.
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``#clock-cells``
- ``int``
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Number of items to expect in a Clock specifier
This property is **required**.
Constant value: ``2``
* - ``clock-frequency``
- ``int``
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default frequency in Hz for clock output
This property is **required**.
* - ``ahb-prescaler``
- ``int``
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AHB prescaler. Defines actual core clock frequency (HCLK)
based on system frequency input.
The HCLK clocks CPU, AHB, memories and DMA.
This property is **required**.
Legal values: ``1``, ``2``, ``4``, ``8``, ``16``, ``64``, ``128``, ``256``, ``512``
* - ``apb1-prescaler``
- ``int``
- This property is **required**.
Legal values: ``1``, ``2``, ``4``, ``8``, ``16``
* - ``apb2-prescaler``
- ``int``
- This property is **required**.
Legal values: ``1``, ``2``, ``4``, ``8``, ``16``
* - ``undershoot-prevention``
- ``boolean``
- .. code-block:: none
On some parts, it could be required to set up highest core frequencies
(>80MHz) in two steps in order to prevent undershoot.
This is done by applying an intermediate AHB prescaler before switching
System Clock source to PLL. Once done, prescaler is set back to expected
value.
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "st,stm32-rcc" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``reg``
- ``array``
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register space
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``status``
- ``string``
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indicates the operational status of a device
Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'``
See :ref:`dt-important-props` for more information.
* - ``compatible``
- ``string-array``
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compatible strings
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
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name of each register space
* - ``interrupts``
- ``array``
- .. code-block:: none
interrupts for device
See :ref:`dt-important-props` for more information.
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
extended interrupt specifier for device
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
name of each interrupt
* - ``interrupt-parent``
- ``phandle``
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phandle to interrupt controller node
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device (used as device_get_binding() argument)
See :ref:`dt-important-props` for more information.
This property is **deprecated**.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Clock gate information
* - ``clock-names``
- ``string-array``
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name of each clock
* - ``#address-cells``
- ``int``
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number of address cells in reg property
* - ``#size-cells``
- ``int``
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number of size cells in reg property
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channels specifiers
* - ``dma-names``
- ``string-array``
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Provided names of DMA channel specifiers
* - ``io-channels``
- ``phandle-array``
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IO channels specifiers
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Provided names of IO channel specifiers
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
mailbox / IPM channels specifiers
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Provided names of mailbox / IPM channel specifiers
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``power-domain``
- ``phandle``
- .. code-block:: none
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.
Specifier cell names
********************
- clock cells: bus, bits