CACHE HAL

group nrf_cache_hal

The hardware access layer for managing the CACHE peripheral.

Defines

NRF_CACHE_HAS_CACHEDATA: Presence of the CACHEDATA feature.

NRF_CACHE_HAS_CACHEDATA_DU: Presence of the CACHE data units feature.

NRF_CACHE_HAS_CACHEINFO: Presence of the CACHEINFO feature.

NRF_CACHE_HAS_TASKS: Symbol indicating whether cache tasks are supported.

NRF_CACHE_HAS_TASK_CLEAN: Symbol indicating whether the CLEAN cache/line tasks are supported.

NRF_CACHE_HAS_TASK_FLUSH: Symbol indicating whether the FLUSH cache/line tasks are supported.

NRF_CACHE_HAS_TASK_SAVE_RESTORE: Symbol indicating whether save and restore tasks are supported.

NRF_CACHE_HAS_STATUS: Symbol indicating whether status check is supported.

NRF_CACHE_HAS_RAM_MODE: Symbol indicating whether splitting the dedicated RAM between cache and generic memory is supported.

NRF_CACHE_HAS_RAMSIZE: Symbol indicating whether configuration of split of dedicated RAM between cache and generic memory is supported.

NRF_CACHE_HAS_CACHEINFO_DU_DIRTY: Symbol indicating whether dirtiness check functionality for cache is supported.

NRF_CACHE_HAS_CACHEINFO_DU_VALIDATION: Symbol indicating whether data unit validation functionality for cache is supported.

NRF_CACHE_HAS_CACHEINFO_SET_WAY_INFO: Symbol indicating whether cache info has INFO register.

NRF_CACHEDATA_DATA_WORDS_IN_UNIT_MAX: Max number of words in CACHEDATA data units.

NRF_CACHEDATA_DATA_UNITS_MAX: Max number of CACHEDATA data units.

NRF_CACHEDATA_WORD_INDEX_MAX: Max number of CACHEDATA words.

NRF_CACHEDATA_WAY_INDEX_MAX: Max number of CACHEDATA ways.

NRF_CACHEDATA_SET_INDEX_MAX: Max number of CACHEDATA sets.

NRF_CACHEINFO_DATA_WORDS_IN_UNIT_MAX: Max number of words in CACHEINFO data units.

NRF_CACHEINFO_DATA_UNITS_MAX: Max number of CACHEINFO data units.

NRF_CACHEINFO_WORD_INDEX_MAX: Max number of CACHEINFO words.

NRF_CACHEINFO_WAY_INDEX_MAX: Max number of CACHEINFO ways.

NRF_CACHEINFO_SET_INDEX_MAX: Max number of CACHEINFO sets.

NRF_CACHE_MODE_RAMSIZE_MAX: Max enumerator value of RAMSIZE field.

Enums

enum nrf_cache_task_t

CACHE tasks.

Values:

enumerator NRF_CACHE_TASK_CLEANCACHE: Clean the whole cache.

enumerator NRF_CACHE_TASK_CLEANLINE: Clean the cache line.

enumerator NRF_CACHE_TASK_FLUSHCACHE: Flush the whole cache.

enumerator NRF_CACHE_TASK_FLUSHLINE: Flush the cache line.

enumerator NRF_CACHE_TASK_SAVE: Save the state to a retained memory space.

enumerator NRF_CACHE_TASK_RESTORE: Restore the state from a retained memory space.

enumerator NRF_CACHE_TASK_INVALIDATECACHE: Invalidate the whole cache.

enumerator NRF_CACHE_TASK_INVALIDATELINE: Invalidate the cache line.

enumerator NRF_CACHE_TASK_ERASE: Erase the whole cache.

enum nrf_cache_region_t

Cache regions.

Values:

enumerator NRF_CACHE_REGION_FLASH: Cache region related to Flash access.

enumerator NRF_CACHE_REGION_XIP: Cache region related to XIP access.

enum nrf_cache_ramsize_t

Dedicated RAM size used for cache memory.

Values:

enumerator NRF_CACHE_RAMSIZE_ALL: All RAM is used for cache memory.

enumerator NRF_CACHE_RAMSIZE_HALF: Half of the RAM is used for cache memory.

enumerator NRF_CACHE_RAMSIZE_QUARTER: Quarter of the RAM is used for cache memory.

enumerator NRF_CACHE_RAMSIZE_NONE: None of the RAM is used for cache memory.

Functions

NRF_STATIC_INLINE void nrf_cache_enable(NRF_CACHE_Type *p_reg)

Function for enabling the CACHE peripheral.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE void nrf_cache_disable(NRF_CACHE_Type *p_reg)

Function for disabling the CACHE peripheral.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE bool nrf_cache_enable_check(NRF_CACHE_Type const *p_reg)

Function for checking if the CACHE peripheral is enabled.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Return values:

true – The CACHE is enabled.
false – The CACHE is not enabled.

NRF_STATIC_INLINE void nrf_cache_invalidate(NRF_CACHE_Type *p_reg)

Function for invalidating the cache content.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE void nrf_cache_erase(NRF_CACHE_Type *p_reg)

Function for erasing the cache content.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE bool nrf_cache_erase_status_check(NRF_CACHE_Type const *p_reg)

Function for checking the status of nrf_cache_erase().

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Return values:

true – Erase is finished.
false – Erase is not complete or has not started.

NRF_STATIC_INLINE void nrf_cache_erase_status_clear(NRF_CACHE_Type *p_reg)

Function for clearing the status of the cache erase.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE void nrf_cache_profiling_set(NRF_CACHE_Type *p_reg, bool enable)

Function for setting the cache profiling.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
enable – [in] True if cache profiling is to be enabled, false otherwise.

NRF_STATIC_INLINE void nrf_cache_profiling_counters_clear(NRF_CACHE_Type *p_reg)

Function for clearing the cache profiling counters.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE uint32_t nrf_cache_instruction_hit_counter_get(NRF_CACHE_Type const *p_reg, nrf_cache_region_t region)

Function for getting the number of cache hits for instruction fetch from the specified cache region.

Note

Separate counters are used for flash region and XIP region.

Note

Cache profiling must be enabled first. See nrf_cache_profiling_set.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region – [in] Cache region.

Returns:

Number of instruction fetch cache hits.

NRF_STATIC_INLINE uint32_t nrf_cache_instruction_miss_counter_get(NRF_CACHE_Type const *p_reg, nrf_cache_region_t region)

Function for getting the number of cache misses for instruction fetch from the specified cache region.

Note

Separate counters are used for flash region and XIP region.

Note

Cache profiling must be enabled first. See nrf_cache_profiling_set.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region – [in] Cache region.

Returns:

Number of instruction fetch cache misses.

NRF_STATIC_INLINE uint32_t nrf_cache_data_hit_counter_get(NRF_CACHE_Type const *p_reg, nrf_cache_region_t region)

Function for getting the number of cache hits for data fetch from the specified cache region.

Note

Separate counters are used for flash region and XIP region.

Note

Cache profiling must be enabled first. See nrf_cache_profiling_set.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region – [in] Cache region.

Returns:

Number of data fetch cache hits.

NRF_STATIC_INLINE uint32_t nrf_cache_data_miss_counter_get(NRF_CACHE_Type const *p_reg, nrf_cache_region_t region)

Function for getting the number of cache misses for data fetch from the specified cache region.

Note

Separate counters are used for flash region and XIP region.

Note

Cache profiling must be enabled first. See nrf_cache_profiling_set.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region – [in] Cache region.

Returns:

Number of data fetch cache misses.

NRF_STATIC_INLINE void nrf_cache_ram_mode_set(NRF_CACHE_Type *p_reg, bool enable)

Function for setting the cache RAM mode.

When configured in the RAM mode, the accesses to internal or external flash will not be cached. In this mode, the cache data contents can be used as the read/write RAM. Only the data content of the cache is available as RAM.

Note

Enabling the RAM mode causes the RAM to be cleared.

Note

Disabling the RAM mode causes the cache to be invalidated.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
enable – [in] True if the cache RAM mode is to be enabled, false otherwise.

NRF_STATIC_INLINE bool nrf_cache_ram_mode_check(NRF_CACHE_Type const *p_reg)

Function for checking whether the cache is in RAM mode.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Returns:

True if the cache RAM mode is enabled, false otherwise.

NRF_STATIC_INLINE void nrf_cache_ramsize_set(NRF_CACHE_Type *p_reg, nrf_cache_ramsize_t ramsize)

Function for setting the configuration of splitting the dedicated cache RAM.

Dedicated cache RAM can be splitted into cache memory and generic memory. By default, all dedicated RAM is used for cache memory.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
ramsize – [in] Dedicated cache RAM split configuration.

NRF_STATIC_INLINE nrf_cache_ramsize_t nrf_cache_ramsize_get(NRF_CACHE_Type const *p_reg)

Function for getting the configuration of splitting the dedicated cache RAM.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Returns:

Configuration of dedicated cache RAM split.

NRF_STATIC_INLINE void nrf_cache_read_lock_enable(NRF_CACHE_Type *p_reg)

Function for blocking the cache content access.

To unlock the cache content access, a reset has to be performed.

Note

Blocking is ignored in the RAM mode.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

NRF_STATIC_INLINE void nrf_cache_update_lock_set(NRF_CACHE_Type *p_reg, bool enable)

Function for blocking the cache content updates.

Blocking of updates prevents updating of cache content on cache misses, but the peripheral will continue to check for instruction/data fetches in the content already present in the cache.

Note

Blocking is ignored in the RAM mode.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
enable – [in] True if cache content update lock is to be enabled, false otherwise.

NRF_STATIC_INLINE uint32_t nrf_cache_data_get(NRF_CACHEDATA_Type const *p_reg, uint32_t set, uint8_t way, uint8_t word)

Function for getting the cache data word.

Note

When operating in the RAM mode, the cache data is accessible as a general purpose RAM.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Set that contains the data to get.
way – [in] Way that contains the data to get.
word – [in] Data word index to get.

Returns:

32-bit data word.

NRF_STATIC_INLINE uint32_t nrf_cache_tag_get(NRF_CACHEINFO_Type const *p_reg, uint32_t set, uint8_t way)

Function for getting the tag associated with the specified set and way.

The tag is used to check if an entry in the cache matches the address that is being fetched.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Set that contains the tag to get.
way – [in] Way that contains the tag to get.

Returns:

Tag value.

NRF_STATIC_INLINE bool nrf_cache_line_validity_check(NRF_CACHEINFO_Type const *p_reg, uint32_t set, uint8_t way)

Function for checking the validity of a cache line associated with the specified set and way.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Set that contains the cache line to check.
way – [in] Way that contains the cache line to check.

Return values:

true – Cache line is valid.
false – Cache line is invalid.

NRF_STATIC_INLINE uint8_t nrf_cache_mru_get(NRF_CACHEINFO_Type const *p_reg, uint32_t set)

Function for getting the most recently used way in the specified set.

The most recently used way is updated on each fetch from the cache and is used for the cache replacement policy.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Specified set.

Returns:

The most recently used way in the specified set.

NRF_STATIC_INLINE bool nrf_cache_data_unit_validity_check(NRF_CACHEINFO_Type const *p_reg, uint32_t set, uint8_t way, uint8_t word)

Function for checking the validity of a data unit associated with the specified set, way and word.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Set that contains the data unit to check.
way – [in] Way that contains the data unit to check.
word – [in] Data word index.

Return values:

true – Data unit is valid.
false – Data unit is invalid.

NRF_STATIC_INLINE bool nrf_cache_is_data_unit_dirty_check(NRF_CACHEINFO_Type const *p_reg, uint32_t set, uint8_t way, uint8_t word)

Function for checking the dirtiness of a data unit associated with the specified set, way and word.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
set – [in] Set that contains the data unit to check.
way – [in] Way that contains the data unit to check.
word – [in] Data word index.

Return values:

true – Data unit is dirty.
false – Data unit is clean.

NRF_STATIC_INLINE void nrf_cache_lineaddr_set(NRF_CACHE_Type *p_reg, uint32_t addr)

Function to set the memory address covered by the line to be maintained.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
addr – [in] Cache line adress.

NRF_STATIC_INLINE void nrf_cache_task_trigger(NRF_CACHE_Type *p_reg, nrf_cache_task_t task)

Function for triggering the specified CACHE task.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
task – [in] Task.

NRF_STATIC_INLINE uint32_t nrf_cache_task_address_get(NRF_CACHE_Type const *p_reg, nrf_cache_task_t task)

Function for returning the address of the specified task register.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
task – [in] Task.

Returns:

Task address.

NRF_STATIC_INLINE bool nrf_cache_busy_check(NRF_CACHE_Type const *p_reg)

Function for checking if the cache is busy or not.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Returns:

True if the cache is busy, false otherwise.