:orphan: .. raw:: html .. dtcompatible:: nxp,s32ze-pinctrl .. _dtbinding_nxp_s32ze_pinctrl: nxp,s32ze-pinctrl ################# Vendor: :ref:`NXP Semiconductors ` Description *********** .. code-block:: none NXP S32 pinctrl node for S32Z/E SoCs. The NXP S32 pin controller is a singleton node responsible for controlling the pin function selection and pin properties. This node, labeled 'pinctrl' in the SoC's devicetree, will define pin configurations in pin groups. Each group within the pin configuration defines the pin configuration for a peripheral, and each numbered subgroup in the pin group defines all the pins for that peripheral with the same configuration properties. The 'pinmux' property in a group selects the pins to be configured, and the remaining properties set configuration values for those pins. For example, to configure the pinmux for UART0, modify the 'pinctrl' from your board or application devicetree overlay as follows: /* Include the SoC package header containing the predefined pins definitions */ #include &pinctrl { uart0_default: uart0_default { group1 { pinmux = ; output-enable; }; group2 { pinmux = ; input-enable; }; }; }; The 'uart0_default' node contains the pin configurations for a particular state of a device. The 'default' state is the active state. Other states for the same device can be specified in separate child nodes of 'pinctrl'. In addition to 'pinmux' property, each group can contain other properties such as 'bias-pull-up' or 'slew-rate' that will be applied to all the pins defined in 'pinmux' array. To enable the input buffer use 'input-enable' and to enable the output buffer use 'output-enable'. To link the pin configurations with UART0 device, use pinctrl-N property in the device node, where 'N' is the zero-based state index (0 is the default state). Following previous example: &uart0 { pinctrl-0 = <&uart0_default>; pinctrl-names = "default"; status = "okay"; }; If only the required properties are supplied, the pin configuration register will be assigned the following reset values: - input and output buffers disabled - internal pull not enabled - open drain disabled - slew rate 4 (see description in property below). Additionally, Safe Mode is always disabled (reset value) and configuration that only applies to LVDS pads, which are not supported, default to reset values: - termination resistor disabled - receiver single ended - current reference control disabled - Rx current boost disabled. Properties ********** Top level properties ==================== These property descriptions apply to "nxp,s32ze-pinctrl" nodes themselves. This page also describes child node properties in the following sections. .. tabs:: .. group-tab:: Node specific properties Properties not inherited from the base binding file. (None) .. group-tab:: Deprecated node specific properties Deprecated properties not inherited from the base binding file. (None) .. group-tab:: Base properties Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the "nxp,s32ze-pinctrl" compatible. .. list-table:: :widths: 1 1 4 :header-rows: 1 * - Name - Type - Details * - ``status`` - ``string`` - .. code-block:: none indicates the operational status of a device Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'`` See :ref:`dt-important-props` for more information. * - ``compatible`` - ``string-array`` - .. code-block:: none compatible strings This property is **required**. See :ref:`dt-important-props` for more information. * - ``reg`` - ``array`` - .. code-block:: none register space See :ref:`dt-important-props` for more information. * - ``reg-names`` - ``string-array`` - .. code-block:: none name of each register space * - ``interrupts`` - ``array`` - .. code-block:: none interrupts for device See :ref:`dt-important-props` for more information. * - ``interrupts-extended`` - ``compound`` - .. code-block:: none extended interrupt specifier for device * - ``interrupt-names`` - ``string-array`` - .. code-block:: none name of each interrupt * - ``interrupt-parent`` - ``phandle`` - .. code-block:: none phandle to interrupt controller node * - ``label`` - ``string`` - .. code-block:: none Human readable string describing the device (used as device_get_binding() argument) See :ref:`dt-important-props` for more information. This property is **deprecated**. * - ``clocks`` - ``phandle-array`` - .. code-block:: none Clock gate information * - ``clock-names`` - ``string-array`` - .. code-block:: none name of each clock * - ``#address-cells`` - ``int`` - .. code-block:: none number of address cells in reg property * - ``#size-cells`` - ``int`` - .. code-block:: none number of size cells in reg property * - ``dmas`` - ``phandle-array`` - .. code-block:: none DMA channels specifiers * - ``dma-names`` - ``string-array`` - .. code-block:: none Provided names of DMA channel specifiers * - ``io-channels`` - ``phandle-array`` - .. code-block:: none IO channels specifiers * - ``io-channel-names`` - ``string-array`` - .. code-block:: none Provided names of IO channel specifiers * - ``mboxes`` - ``phandle-array`` - .. code-block:: none mailbox / IPM channels specifiers * - ``mbox-names`` - ``string-array`` - .. code-block:: none Provided names of mailbox / IPM channel specifiers * - ``wakeup-source`` - ``boolean`` - .. code-block:: none Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary. * - ``power-domain`` - ``phandle`` - .. code-block:: none Power domain the device belongs to. The device will be notified when the power domain it belongs to is either suspended or resumed. Grandchild node properties ========================== .. list-table:: :widths: 1 1 4 :header-rows: 1 * - Name - Type - Details * - ``pinmux`` - ``array`` - .. code-block:: none An array of pins sharing the same group properties. The pins must be defined using the macros from the SoC package header. These macros encode all the pin muxing information in a 32-bit value. This property is **required**. * - ``slew-rate`` - ``int`` - .. code-block:: none Slew rate control. Reset value is 4. - For 3.3 V / 1.8 V FAST pads: 0: FMAX_3318 = 208 MHz (at 1.8 V), 166 MHz (at 3.3 V) 4: FMAX_3318 = 166 MHz (at 1.8 V), 150 MHz (at 3.3 V) 5: FMAX_3318 = 150 MHz (at 1.8 V), 133 MHz (at 3.3 V) 6: FMAX_3318 = 133 MHz (at 1.8 V), 100 MHz (at 3.3 V) 7: FMAX_3318 = 100 MHz (at 1.8 V), 83 MHz (at 3.3 V) - For 1.8 V GPIO pads: 0: FMAX_18 = 208 MHz 4: FMAX_18 = 150 MHz 5: FMAX_18 = 133 MHz 6: FMAX_18 = 100 MHz 7: FMAX_18 = 50 MHz - For 3.3 V GPIO pads: 0: Reserved 4: FMAX_33 = 50 MHz 5: FMAX_33 = 50 MHz 6: FMAX_33 = 50 MHz 7: FMAX_33 = 1 MHz Default value: ``4`` Legal values: ``0``, ``4``, ``5``, ``6``, ``7`` * - ``bias-pull-up`` - ``boolean`` - .. code-block:: none enable pull-up resistor * - ``bias-pull-down`` - ``boolean`` - .. code-block:: none enable pull-down resistor * - ``drive-open-drain`` - ``boolean`` - .. code-block:: none drive with open drain (hardware AND) * - ``input-enable`` - ``boolean`` - .. code-block:: none enable input on pin (no effect on output, such as enabling an input buffer) * - ``output-enable`` - ``boolean`` - .. code-block:: none enable output on a pin without actively driving it (such as enabling an output buffer)