nordic,nrf-qspi

Vendor: Nordic Semiconductor

Description

These nodes are “qspi” bus nodes.

Properties defining the interface for the Nordic QSPI peripheral.

The reg property describes two register blocks: one for the memory
corresponding to the QSPI peripheral registers, and another for
the memory mapped XIP area:

    qspi: qspi@2b000 {
            compatible = "nordic,nrf-qspi";
            reg = <0x2b000 0x1000>, <0x10000000 0x10000000>;
            reg-names = "qspi", "qspi_mm";
            ...
    };

Above, the register block with base address 0x2b000 and name
"qspi" are the QSPI peripheral registers. The register block with
base address 0x10000000 and name "qspi_mm" is the XIP area.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

io-pins

array

IMPORTANT: This option will only be used if the new pin control driver
is not enabled.

Pin numbers associated with IO0 through IO3 signals.

Examples:

    io-pins = <io0-pin io1-pin>; // two pins

    io-pins = <io0-pin io1-pin io2-pin io3-pin>; // four pins

Either two or four pins must be configured using this property
as shown above. The pin numbering scheme is the same as the
sck-pin property's.

csn-pins

array

IMPORTANT: This option will only be used if the new pin control driver
is not enabled.

Chip select signal pin number. Exactly one pin should be
given. The pin numbering scheme is the same as the
sck-pin property's.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.