xlnx,xps-timer-1.00.a¶
Vendor: Xilinx
Description¶
Xilinx AXI Timer IP node
Properties¶
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Clock frequency information for RTC operation
This property is required. |
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Individual timer/counter width in bits.
This property is required. Legal values: |
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Active state of the generateout0 signal (0 for active-low, 1 for
active-high).
Legal values: |
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Active state of the generateout1 signal (0 for active-low, 1 for
active-high).
Legal values: |
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0 if both Timer 1 and Timer 2 are enabled, 1 if only Timer 1 is enabled.
This property is required. Legal values: |
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Active state of the capturetrig0 signal (0 for active-low, 1 for
active-high).
Legal values: |
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Active state of the capturetrig1 signal (0 for active-low, 1 for
active-high).
Legal values: |
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RTC frequency equals clock-frequency divided by the prescaler value
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Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “xlnx,xps-timer-1.00.a” compatible.
Name |
Type |
Details |
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Human readable string describing the device (used as device_get_binding() argument)
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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