ti,boosterpack-header¶
Vendor: Texas Instruments
Description¶
TI BoosterPack GPIO header
GPIO pins exposed as BoosterPack headers on TI LaunchPads.
BoosterPack plug-in modules are available in 20 and 40 pin variants. The
20 pin variant has two 10 x 1 pin headers and the 40 pin variant has two
10 x 2 pin headers. Both variants are compatible and stackable.
The pins of the 20 pin variant and the outer row of the 40 pin variant are
numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21
through 40. The BoosterPack pinout is depicted below:
1 3.3V 21 5V 40 GPIO 20 GND
2 Analog 22 GND 39 GPIO 19 GPIO / SPI CS
3 UART RXD 23 Analog 38 GPIO 18 GPIO
4 UART TXD 24 Analog 37 GPIO 17 GPIO
5 GPIO 25 Analog 36 GPIO 16 RESET
6 Analog 26 Analog 35 GPIO 15 SPI MOSI
7 SPI CLK 27 Analog 34 GPIO 14 SPI MISO
8 GPIO 28 Analog 33 GPIO 13 GPIO / SPI CS
9 I2C SCL 29 32 GPIO 12 GPIO / SPI CS
10 I2C SDA 30 31 GPIO 11 GPIO
Additional information about the BoosterPack pinout can be found at
http://processors.wiki.ti.com/index.php/BYOB or in the documentation for
a TI LaunchPad development kit,
Properties¶
Properties not inherited from the base binding file.
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Type |
Details |
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This property is required. |
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Number of items to expect in a GPIO specifier
This property is required. |
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “ti,boosterpack-header” compatible.
Name |
Type |
Details |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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