st,stm32-usb¶
Vendor: STMicroelectronics
Description¶
STM32 USB controller
Properties¶
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Size of USB dedicated RAM. STM32 SOC's reference manual defines USB packet SRAM size.
This property is required. |
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Some boards use a USB DISCONNECT pin to enable the pull-up resistor on USB Data Positive signal.
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PHY provider specifier
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For STM32F0 series SoCs on QFN28 and TSSOP20 packages enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
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Pin configuration for USB signals (DM/DP/NOE).
We expect that the phandles will reference pinctrl nodes.
For example:
<&usb_dm_pa11 &usb_dp_pa12>;
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Number of bi-directional endpoints supported by hardware (including EP0)
This property is required. |
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Number of IN endpoints supported by hardware (including EP0 IN)
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Number of OUT endpoints supported by hardware (including EP0 OUT)
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Configures USB controllers to work up to a specific speed. Valid arguments are "super-speed", "high-speed", "full-speed" and "low-speed". If this is not passed via DT, USB controllers should use their maximum hardware capability.
Legal values: |
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Control VBUS via GPIO pin.
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Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-usb” compatible.
Name |
Type |
Details |
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register space
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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Clock gate information
This property is required. |
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Human readable string describing the device (used as device_get_binding() argument)
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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