st,stm32-i2c-v2¶
Vendor: STMicroelectronics
Properties¶
Properties not inherited from the base binding file.
Name |
Type |
Details |
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GPIO pin configuration for serial signals (SDA, SCL). We expect
that the phandles will reference pinctrl nodes.
For example the I2C1 would be
pinctrl-0 = <&i2c1_sda_pb11 &i2c1_scl_pb10>;
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An optional table of pre-computed i2c timing values with the
matching clock configuration.
Precise timings values for a given Hardware can be pre-computed
with a tool like STM32CubeMX or directly from I2C_TIMINGR register
description.
Because timing value is valid for a given I2C peripheral clock
frequency and target I2C bus clock, each timing value must be
provided with the matching configuration.
The resulting table entries should look like <periph_clock
clock-frequency timing>
For example timings could be defined as
timings = <64000000 I2C_BITRATE_STANDARD 0x10707DBC>,
<64000000 I2C_BITRATE_FAST 0x00603D56>,
<56000000 I2C_BITRATE_STANDARD 0x10606DA4>,
<56000000 I2C_BITRATE_FAST 0x00501D63>;
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Initial clock frequency in Hz
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Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-i2c-v2” compatible.
Name |
Type |
Details |
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register space
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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number of address cells in reg property
This property is required. Constant value: |
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number of size cells in reg property
This property is required. |
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Human readable string describing the device (used as device_get_binding() argument)
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Clock gate information
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name of each clock
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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