particle-gen3-header¶
Vendor: Generic or vendor-independent
Description¶
GPIO pins exposed on Particle Gen3 (Feather) headers.
The Particle Gen3 boards are compatible with the Adafruit Feather
"shields" but use a different orientation and pin numbering scheme.
With the board oriented with the micro USB at the top:
* A 12-pin header on the right. 9 pins on this header are exposed
by this binding
* A 16-pin header. 13 pins on this header are exposed by this
binding.
This binding provides a nexus mapping for 22 pins where parent pins
0 through 8 correspond to the pins on the 12-pin header, starting
from the bottom; and pins 9 through 21 correspond to pins on the
16-pin header, skipping the bottom pin then assigning 9 through 19,
skipping over GND, and replacing the lower 3V3 with pin 20. The
physical layout is depicted below.
21 RESETn
- 3V3
20 MODEn
- GND
19 ADC0 LiPo+ -
18 ADC1 ENABLE -
17 ADC2 VBUS -
16 ADC3 PWM1 8
15 ADC4 PWM0 7
14 SS PWM1 6
13 SCK PWM1 5
12 MOSI PWM1 4
11 MISO PWM3 3
10 RX PWM3 2
9 TX SCL 1
- n/c SDA 0
Properties¶
Properties not inherited from the base binding file.
Name |
Type |
Details |
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This property is required. |
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Number of items to expect in a GPIO specifier
This property is required. |
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “particle-gen3-header” compatible.
Name |
Type |
Details |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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