nordic,qspi-nor (on qspi bus)¶
Vendor: Nordic Semiconductor
Description¶
QSPI NOR flash supporting the JEDEC CFI interface.
Properties¶
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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JEDEC ID as manufacturer ID, memory type, memory density
This property is required. |
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flash capacity in bits
This property is required. |
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Specify the number of data lines and opcode used for reading.
If not provided fastread will be selected.
Legal values: |
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Specify the number of data lines and opcode used for writing.
If not provided pp will be selected.
Legal values: |
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Set to indicate that 32-bit addressing is to be used.
If not specified 24-bit addressing will be used.
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Set to indicate that the write opcode operates on 512-byte pages.
If not specified the write opcode operates on 256-byte pages.
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Number of clock cycles CSn must be asserted before it can go low
again, specified in nanoseconds.
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Set to indicate phase starts with asserted half-phase (CPHA=1).
For this driver using this property requires also using cpol.
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Set to indicate clock leading edge is falling (CPOL=1).
For this driver using this property requires also using cpha.
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Maximum clock speed supported by the device, in Hz.
This property is required. |
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Contains the 32-bit words in little-endian byte order from the
JESD216 Serial Flash Discoverable Parameters Basic Flash
Parameters table. This provides flash-specific configuration
information in cases were runtime configuration is not desired.
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Not used after Zephyr 2.3.0
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Indicates the device requires the ULBPR (0x98) command.
Some flash chips such as the Microchip SST26VF series have a block
protection register that initializes to write-protected. Use this
property to indicate that the BPR must be unlocked before write
operations can proceed.
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Indicates the device supports the DPD (0xB9) command.
Use this property to indicate the flash chip supports the Deep
Power-Down mode that is entered by command 0xB9 to reduce power
consumption below normal standby levels. Use of this property
implies that the RDPD (0xAB) Release from Deep Power Down command
is also supported. (On some chips this command functions as Read
Electronic Signature; see t-enter-dpd).
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Specifies wakeup durations for devices without RDPD.
Some devices (Macronix MX25R in particular) wake from deep power
down by a timed sequence of CSn toggles rather than the RDPD
command. This property specifies three durations measured in
nanoseconds, in this order:
(1) tDPDD (Delay Time for Release from Deep Power-Down Mode)
(2) tCDRP (CSn Toggling Time before Release from Deep Power-Down Mode)
(3) tRDP (Recovery Time for Release from Deep Power-Down Mode)
Absence of this property indicates that the RDPD command should be
used to wake the chip from Deep Power-Down mode.
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Duration required to complete the DPD command.
This provides the duration, in nanoseconds, that CSn must be
remain deasserted after issuing DPD before the chip will enter
deep power down.
If not provided the driver does not enforce a delay.
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Duration required to complete the RDPD command.
This provides the duration, in nanoseconds, that CSn must be
remain deasserted after issuing RDPD before the chip will exit
deep power down and be ready to receive additional commands.
If not provided the driver does not enforce a delay.
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Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nordic,qspi-nor” compatible.
Name |
Type |
Details |
|---|---|---|
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register space
This property is required. See Important properties for more information. |
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Human readable string describing the device (used as device_get_binding() argument)
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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