Help¶

This divisor defines a ratio between processor clock (HCLK) and master clock (MCK): HCLK = MCK / PROC_CLK_DIV Allowed divider values: 1, 3, 4, 16, and 48.

Direct dependencies¶

SOC_FAMILY_MEC

(Includes any dependencies from ifs and menus.)

Default¶

1

Kconfig definition¶

At <Zephyr>/soc/arm/microchip_mec/mec1501/Kconfig.soc:22

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:28 → <Zephyr>/soc/Kconfig:11 → <BuildDir>/Kconfig/Kconfig.soc.arch:2 → <Zephyr>/soc/arm/microchip_mec/Kconfig:15

Menu path: (Top) → Hardware Configuration

config SOC_MEC1501_PROC_CLK_DIV
    int "PROC_CLK_DIV"
    range 1 48
    default 1
    depends on SOC_FAMILY_MEC
    help
      This divisor defines a ratio between processor clock (HCLK)
      and master clock (MCK):
      HCLK = MCK / PROC_CLK_DIV
      Allowed divider values: 1, 3, 4, 16, and 48.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)