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CONFIG_I2S_STM32_PLLI2S_PLLR
¶
Division factor for I2S clock
Type: int
Help¶
Division factor for the I2S clock. PLLR factor should be selected to ensure that the I2S clock frequency is less than or equal to 192MHz. Allowed values: 2-7
Direct dependencies¶
(I2S
&& BOARD_NUCLEO_F411RE
) || (I2S
&& BOARD_96B_ARGONKEY
) || (I2S
&& BOARD_96B_STM32_SENSOR_MEZ
) || (I2S
&& BOARD_NUCLEO_F411RE
) || (I2S_STM32_USE_PLLI2S_ENABLE
&& I2S_STM32
&& I2S
)
(Includes any dependencies from ifs and menus.)
Defaults¶
3
3
3
3
7
Kconfig definitions¶
At <Zephyr>/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:40
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:23
→ <BuildDir>/Kconfig/Kconfig.shield.defconfig:1
→ <Zephyr>/boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5
Menu path: (Top)
config I2S_STM32_PLLI2S_PLLR int default 3 depends onI2S
&&BOARD_NUCLEO_F411RE
At <Zephyr>/boards/arm/96b_argonkey/Kconfig.defconfig:23
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:24
Menu path: (Top)
config I2S_STM32_PLLI2S_PLLR int default 3 depends onI2S
&&BOARD_96B_ARGONKEY
At <Zephyr>/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig:23
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:24
Menu path: (Top)
config I2S_STM32_PLLI2S_PLLR int default 3 depends onI2S
&&BOARD_96B_STM32_SENSOR_MEZ
At <Zephyr>/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:40
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:24
→ <Zephyr>/boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5
Menu path: (Top)
config I2S_STM32_PLLI2S_PLLR int default 3 depends onI2S
&&BOARD_NUCLEO_F411RE
At <Zephyr>/drivers/i2s/Kconfig.stm32:53
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:42
→ <Zephyr>/drivers/i2s/Kconfig:28
Menu path: (Top) → Device Drivers → I2S bus drivers → STM32 MCU I2S controller driver → Enable usage of PLL
config I2S_STM32_PLLI2S_PLLR int "Division factor for I2S clock" range 2 7 default 7 depends onI2S_STM32_USE_PLLI2S_ENABLE
&&I2S_STM32
&&I2S
help Division factor for the I2S clock. PLLR factor should be selected to ensure that the I2S clock frequency is less than or equal to 192MHz. Allowed values: 2-7
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)