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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER
¶
Multiplier factor for PLL VCO output clock
PLL1 VCO multiplier
PLL multiplier
PLL multiplier
PLL multiplier
Type: int
Help¶
PLLN multiplier factor needs to be set correctly to ensure that the VCO output frequency is between 100 and 432 MHz, except on STM32F401 where the frequency must be between 192 and 432 MHz. Allowed values: 50-432 (STM32F401: 192-432)
Help¶
PLL multiplier, allowed values: 4-512.
Help¶
PLL multiplier, allowed values: 2-16. PLL output must not exceed 344MHz.
Help¶
PLL multiplier, allowed values: 8-86 PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).
Help¶
PLL multiplier, allowed values: 8-127.
Direct dependencies¶
(CLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32F2X
|| SOC_SERIES_STM32F4X
|| SOC_SERIES_STM32F7X
) && CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32H7X
&& CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32L4X
|| SOC_SERIES_STM32L5X
|| SOC_SERIES_STM32WBX
) && CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32G0X
&& CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32G4X
&& CLOCK_CONTROL_STM32_CUBE
&& CLOCK_CONTROL
)
(Includes any dependencies from ifs and menus.)
Defaults¶
336
129
20
8
75
Kconfig definitions¶
At <Zephyr>/drivers/clock_control/Kconfig.stm32f2_f4_f7:19
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:132
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_N_MULTIPLIER int "Multiplier factor for PLL VCO output clock" range 192 432 ifSOC_STM32F401XE
||SOC_SERIES_STM32F2X
range 50 432 default 336 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32F2X
||SOC_SERIES_STM32F4X
||SOC_SERIES_STM32F7X
) &&CLOCK_CONTROL_STM32_CUBE
&&CLOCK_CONTROL
help PLLN multiplier factor needs to be set correctly to ensure that the VCO output frequency is between 100 and 432 MHz, except on STM32F401 where the frequency must be between 192 and 432 MHz. Allowed values: 50-432 (STM32F401: 192-432)
At <Zephyr>/drivers/clock_control/Kconfig.stm32h7:75
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:133
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_N_MULTIPLIER int "PLL1 VCO multiplier" range 4 512 default 129 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32H7X
&&CLOCK_CONTROL_STM32_CUBE
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 4-512.
At <Zephyr>/drivers/clock_control/Kconfig.stm32l4_l5_wb:17
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:135
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_N_MULTIPLIER int "PLL multiplier" range 8 86 default 20 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&& (SOC_SERIES_STM32L4X
||SOC_SERIES_STM32L5X
||SOC_SERIES_STM32WBX
) &&CLOCK_CONTROL_STM32_CUBE
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 2-16. PLL output must not exceed 344MHz.
At <Zephyr>/drivers/clock_control/Kconfig.stm32g0:8
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:136
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_N_MULTIPLIER int "PLL multiplier" range 8 86 default 8 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32G0X
&&CLOCK_CONTROL_STM32_CUBE
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 8-86 PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).
At <Zephyr>/drivers/clock_control/Kconfig.stm32g4:16
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:32
→ <Zephyr>/drivers/Kconfig:54
→ <Zephyr>/drivers/clock_control/Kconfig:25
→ <Zephyr>/drivers/clock_control/Kconfig.stm32:137
Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_N_MULTIPLIER int "PLL multiplier" range 8 127 default 75 depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32G4X
&&CLOCK_CONTROL_STM32_CUBE
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 8-127.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)