CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER

Multiplier factor for PLL VCO output clock

PLL1 VCO multiplier

PLL multiplier

PLL multiplier

PLL multiplier

Type: int

Help

PLLN multiplier factor needs to be set correctly to ensure that the VCO output frequency is between 100 and 432 MHz, except on STM32F401 where the frequency must be between 192 and 432 MHz. Allowed values: 50-432 (STM32F401: 192-432)

Help

PLL multiplier, allowed values: 4-512.

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PLL multiplier, allowed values: 2-16. PLL output must not exceed 344MHz.

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PLL multiplier, allowed values: 8-86 PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).

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PLL multiplier, allowed values: 8-127.

Defaults

  • 336

  • 129

  • 20

  • 8

  • 75

Kconfig definitions

At drivers/clock_control/Kconfig.stm32f2_f4_f7:19

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:48drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:122

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int "Multiplier factor for PLL VCO output clock"
    range 192 432 if SOC_STM32F401XE || SOC_SERIES_STM32F2X
    range 50 432
    default 336
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F2X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLLN multiplier factor needs to be set correctly to ensure that the
      VCO output frequency is between 100 and 432 MHz, except on STM32F401
      where the frequency must be between 192 and 432 MHz.
      Allowed values: 50-432 (STM32F401: 192-432)

At drivers/clock_control/Kconfig.stm32h7:64

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:48drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:123

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int "PLL1 VCO multiplier"
    range 4 512
    default 129
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32H7X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLL multiplier, allowed values: 4-512.

At drivers/clock_control/Kconfig.stm32l4_wb:17

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:48drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:125

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int "PLL multiplier"
    range 8 86
    default 20
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLL multiplier, allowed values: 2-16. PLL output must not
      exceed 344MHz.

At drivers/clock_control/Kconfig.stm32g0:8

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:48drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:126

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int "PLL multiplier"
    range 8 86
    default 8
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32G0X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLL multiplier, allowed values: 8-86
      PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).

At drivers/clock_control/Kconfig.stm32g4:16

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:48drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:127

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int "PLL multiplier"
    range 8 127
    default 75
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32G4X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLL multiplier, allowed values: 8-127.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)