CONFIG_SOC_OPENISA_RV32M1_RISCV32

OpenISA RV32M1 RISC-V cores

Type: bool

Help

Enable support for OpenISA RV32M1 RISC-V processors. Choose this option to target the RI5CY or ZERO-RISCY core. This option should not be used to target either Arm core.

Direct dependencies

RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>

(Includes any dependencies from if’s and menus.)

Kconfig definition

At soc/riscv32/openisa_rv32m1/Kconfig.soc:5

Included via Kconfig:10Kconfig.zephyr:27soc/Kconfig:6

Menu path: (top menu) → SoC/CPU/Configuration Selection

config SOC_OPENISA_RV32M1_RISCV32
    bool
    prompt "OpenISA RV32M1 RISC-V cores" if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select XIP if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select HAS_RV32M1_LPUART if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select HAS_RV32M1_LPI2C if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select ATOMIC_OPERATIONS_C if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select VEGA_SDK_HAL if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select RISCV_SOC_INTERRUPT_INIT if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    select CLOCK_CONTROL if RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    depends on RISCV32 && !CUSTOM_RODATA_LD && !CUSTOM_RWDATA_LD && <choice: SoC/CPU/Configuration Selection>
    help
      Enable support for OpenISA RV32M1 RISC-V processors. Choose
      this option to target the RI5CY or ZERO-RISCY core. This
      option should not be used to target either Arm core.

(Definitions include propagated dependencies, including from if’s and menus.)