CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER

Multiplier factor for PLL VCO output clock

Multiplier factor for PLL VCO output clock

PLL multiplier

Type: int

Help

PLLN multiplier factor needs to be set correctly to ensure that the VCO output frequency is between 192 and 432 MHz.

Help

PLLN multiplier factor needs to be set correctly to ensure that the VCO output frequency is between 100 and 432 MHz, except on STM32F401 where the frequency must be between 192 and 432 MHz. Allowed values: 50-432 (STM32F401: 192-432)

Help

PLL multiplier, allowed values: 2-16. PLL output must not exceed 344MHz.

Kconfig definitions

At boards/arm/disco_l475_iot1/Kconfig.defconfig:47

Included via Kconfig:10Kconfig.zephyr:21

Menu path: (top menu)

config CLOCK_STM32_PLL_N_MULTIPLIER
    int
    default 20 if CLOCK_STM32_PLL_SRC_HSI && CLOCK_STM32_SYSCLK_SRC_PLL && BOARD_DISCO_L475_IOT1
    depends on CLOCK_STM32_PLL_SRC_HSI && CLOCK_STM32_SYSCLK_SRC_PLL && BOARD_DISCO_L475_IOT1

At drivers/clock_control/Kconfig.stm32:208

Included via Kconfig:10Kconfig.zephyr:35drivers/Kconfig:54drivers/clock_control/Kconfig:30

Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int
    prompt "Multiplier factor for PLL VCO output clock" if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32F2X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    range 192 432 if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32F2X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    default 192 if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32F2X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32F2X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLLN multiplier factor needs to be set correctly to ensure that the
      VCO output frequency is between 192 and 432 MHz.

At drivers/clock_control/Kconfig.stm32:270

Included via Kconfig:10Kconfig.zephyr:35drivers/Kconfig:54drivers/clock_control/Kconfig:30

Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int
    prompt "Multiplier factor for PLL VCO output clock" if CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    range 192 432 if SOC_STM32F401XE && CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    range 50 432 if CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    default 336 if CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X) && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLLN multiplier factor needs to be set correctly to ensure that the
      VCO output frequency is between 100 and 432 MHz, except on STM32F401
      where the frequency must be between 192 and 432 MHz.
      Allowed values: 50-432 (STM32F401: 192-432)

At drivers/clock_control/Kconfig.stm32:335

Included via Kconfig:10Kconfig.zephyr:35drivers/Kconfig:54drivers/clock_control/Kconfig:30

Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

config CLOCK_STM32_PLL_N_MULTIPLIER
    int
    prompt "PLL multiplier" if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32L4X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    range 8 86 if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32L4X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    default 20 if CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32L4X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    depends on CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32L4X && CLOCK_CONTROL_STM32_CUBE && SOC_FAMILY_STM32 && CLOCK_CONTROL
    help
      PLL multiplier, allowed values: 2-16. PLL output must not
      exceed 344MHz.

(Definitions include propagated dependencies, including from if’s and menus.)