Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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cache.h
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1/*
2 * Copyright 2021 Carlo Caione <[email protected]>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12#ifndef ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
13#define ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
14
15#include <stddef.h>
16
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#if defined(CONFIG_DCACHE)
29
35void cache_data_enable(void);
36
42void cache_data_disable(void);
43
53int cache_data_flush_all(void);
54
64int cache_data_invd_all(void);
65
76
96int cache_data_flush_range(void *addr, size_t size);
97
118int cache_data_invd_range(void *addr, size_t size);
119
140int cache_data_flush_and_invd_range(void *addr, size_t size);
141
142#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
156size_t cache_data_line_size_get(void);
157
158#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
159
160#endif /* CONFIG_DCACHE */
161
162#if defined(CONFIG_ICACHE)
163
169void cache_instr_enable(void);
170
176void cache_instr_disable(void);
177
187int cache_instr_flush_all(void);
188
198int cache_instr_invd_all(void);
199
210
230int cache_instr_flush_range(void *addr, size_t size);
231
252int cache_instr_invd_range(void *addr, size_t size);
253
274int cache_instr_flush_and_invd_range(void *addr, size_t size);
275
276#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
290size_t cache_instr_line_size_get(void);
291
292#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
293
294#endif /* CONFIG_ICACHE */
295
296#ifdef __cplusplus
297}
298#endif
299
304#endif /* ZEPHYR_INCLUDE_DRIVERS_CACHE_H_ */
#define cache_instr_invd_all
Definition: cache.h:227
#define cache_instr_disable
Definition: cache.h:201
#define cache_instr_flush_all
Definition: cache.h:214
#define cache_data_flush_and_invd_range(addr, size)
Definition: cache.h:157
#define cache_instr_invd_range(addr, size)
Definition: cache.h:287
#define cache_instr_flush_and_invd_all
Definition: cache.h:240
#define cache_instr_enable
Definition: cache.h:192
#define cache_instr_flush_range(addr, size)
Definition: cache.h:263
#define cache_data_invd_range(addr, size)
Definition: cache.h:132
#define cache_instr_flush_and_invd_range(addr, size)
Definition: cache.h:311
#define cache_data_invd_all
Definition: cache.h:72
#define cache_data_flush_range(addr, size)
Definition: cache.h:108
#define cache_data_flush_and_invd_all
Definition: cache.h:85
#define cache_data_flush_all
Definition: cache.h:59
#define cache_data_enable
Definition: cache.h:37
#define cache_instr_line_size_get
Definition: cache.h:332
#define cache_data_disable
Definition: cache.h:46
#define cache_data_line_size_get
Definition: cache.h:177