Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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irq.h
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1/*
2 * Copyright (c) 2019 Carlo Caione <[email protected]>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
15#ifndef ZEPHYR_INCLUDE_ARCH_ARM64_IRQ_H_
16#define ZEPHYR_INCLUDE_ARCH_ARM64_IRQ_H_
17
18#include <zephyr/irq.h>
19#include <zephyr/sw_isr_table.h>
20#include <stdbool.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26#ifdef _ASMLANGUAGE
27GTEXT(arch_irq_enable)
30#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
31GTEXT(z_soc_irq_get_active)
32GTEXT(z_soc_irq_eoi)
33#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
34#else
35
36#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
37
38extern void arch_irq_enable(unsigned int irq);
39extern void arch_irq_disable(unsigned int irq);
40extern int arch_irq_is_enabled(unsigned int irq);
41
42/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
43extern void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio,
45
46#else
47
48/*
49 * When a custom interrupt controller is specified, map the architecture
50 * interrupt control functions to the SoC layer interrupt control functions.
51 */
52
53void z_soc_irq_init(void);
54void z_soc_irq_enable(unsigned int irq);
55void z_soc_irq_disable(unsigned int irq);
56int z_soc_irq_is_enabled(unsigned int irq);
57
58void z_soc_irq_priority_set(
59 unsigned int irq, unsigned int prio, unsigned int flags);
60
61unsigned int z_soc_irq_get_active(void);
62void z_soc_irq_eoi(unsigned int irq);
63
64#define arch_irq_enable(irq) z_soc_irq_enable(irq)
65#define arch_irq_disable(irq) z_soc_irq_disable(irq)
66#define arch_irq_is_enabled(irq) z_soc_irq_is_enabled(irq)
67
68#define z_arm64_irq_priority_set(irq, prio, flags) \
69 z_soc_irq_priority_set(irq, prio, flags)
70
71#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
72
73extern void z_arm64_interrupt_init(void);
74
75/* All arguments must be computable by the compiler at build time.
76 *
77 * Z_ISR_DECLARE will populate the .intList section with the interrupt's
78 * parameters, which will then be used by gen_irq_tables.py to create
79 * the vector table and the software ISR table. This is all done at
80 * build-time.
81 *
82 * We additionally set the priority in the interrupt controller at
83 * runtime.
84 */
85#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
86{ \
87 Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
88 z_arm64_irq_priority_set(irq_p, priority_p, flags_p); \
89}
90
91#endif /* _ASMLANGUAGE */
92
93#ifdef __cplusplus
94}
95#endif
96
97#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_IRQ_H_ */
#define arch_irq_disable(irq)
Definition: irq.h:107
#define arch_irq_enable(irq)
Definition: irq.h:106
#define arch_irq_is_enabled(irq)
Definition: irq.h:109
Public interface for configuring interrupts.
flags
Definition: parser.h:96
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
Software-managed ISR table.