addresses.h

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/*
 * Copyright 2022 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_ADDRESSES_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_ADDRESSES_H_
 
#include <zephyr/types.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/sys/util.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define I3C_BROADCAST_ADDR 0x7E
 
#define I3C_MAX_ADDR 0x7F
 
struct i3c_dev_list;
 
enum i3c_addr_slot_status {
 I3C_ADDR_SLOT_STATUS_FREE = 0U,
 
 I3C_ADDR_SLOT_STATUS_RSVD,
 
 I3C_ADDR_SLOT_STATUS_I3C_DEV,
 
 I3C_ADDR_SLOT_STATUS_I2C_DEV,
 
 I3C_ADDR_SLOT_STATUS_MASK = 0x03U,
};
 
struct i3c_addr_slots {
 /* 2 bits per slot */
 unsigned long slots[((I3C_MAX_ADDR + 1) * 2) / BITS_PER_LONG];
};
 
int i3c_addr_slots_init(const struct device *dev);
 
void i3c_addr_slots_set(struct i3c_addr_slots *slots,
 uint8_t dev_addr,
 enum i3c_addr_slot_status status);
 
enum i3c_addr_slot_status i3c_addr_slots_status(struct i3c_addr_slots *slots,
 uint8_t dev_addr);
 
bool i3c_addr_slots_is_free(struct i3c_addr_slots *slots,
 uint8_t dev_addr);
 
uint8_t i3c_addr_slots_next_free_find(struct i3c_addr_slots *slots, uint8_t start_addr);
 
static inline void i3c_addr_slots_mark_free(struct i3c_addr_slots *addr_slots,
 uint8_t addr)
{
 i3c_addr_slots_set(addr_slots, addr,
 I3C_ADDR_SLOT_STATUS_FREE);
}
 
static inline void i3c_addr_slots_mark_rsvd(struct i3c_addr_slots *addr_slots,
 uint8_t addr)
{
 i3c_addr_slots_set(addr_slots, addr,
 I3C_ADDR_SLOT_STATUS_RSVD);
}
 
static inline void i3c_addr_slots_mark_i3c(struct i3c_addr_slots *addr_slots,
 uint8_t addr)
{
 i3c_addr_slots_set(addr_slots, addr,
 I3C_ADDR_SLOT_STATUS_I3C_DEV);
}
 
static inline void i3c_addr_slots_mark_i2c(struct i3c_addr_slots *addr_slots,
 uint8_t addr)
{
 i3c_addr_slots_set(addr_slots, addr,
 I3C_ADDR_SLOT_STATUS_I2C_DEV);
}
 
#ifdef __cplusplus
}
#endif
 
#endif /* ZEPHYR_INCLUDE_DRIVERS_I3C_ADDRESSES_H_ */