zephyr,sdhc-spi-slot (on spi bus)

Vendor: Zephyr-specific binding

Description

These nodes are “sd” bus nodes.

Generic Zephyr SPI based SDHC controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

supply-gpios

phandle-array

 
GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

 
Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

spi-max-frequency

int

 
Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

 
Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

 
Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

 
SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

 
SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

 
In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

power-delay-ms

int

 
Time in ms for SPI SDHC to delay when toggling power to the SD card. This
delay gives the card time to power up or down fully. It can be increased
if you observe issues initializing your card.

Default value: 1

spi-clock-mode-cpol

boolean

 
Clock polarity to use for SPI SDHC. Some cards respond properly
only when the clock goes low when not active.

spi-clock-mode-cpha

boolean

 
Clock phase: this dictates when is the data captured, and depends
on the clock's polarity. When mode-cpol is set and this option as well,
capture will occur on low to high transition and high to low if
this option is not set (default).

pwr-gpios

phandle-array

 
Power pin
This pin defaults to active high when consumed by the SPI SDHC driver.
It can be used to toggle card power via an external control circuit