nuvoton,numaker-pinctrl

Vendor: Nuvoton Technology Corporation

Description

Pin controller is responsible for controlling pin function
selection and pin properties. For example, for example you can
use this node to set UART0 RX as pin PB12 to fulfill SYS_GPB_MFP3_PB12MFP_UART0_RXD.

The node has the 'pinctrl' node label set in your SoC's devicetree,
so you can modify it like this:

  &pinctrl {
          /* your modifications go here */
  };

All device pin configurations should be placed in child nodes of the
'pinctrl' node, as shown in this example:

  &pinctrl {
    /* configuration for the uart0 "default" state */
    uart0_default: uart0_default {
        /* configure PB13 as UART0 TX and PB12 as UART0 RX */
      group0 {
        pinmux = <PB12MFP_UART0_RXD>, <PB13MFP_UART0_TXD>;
      };
    };
  };


To link pin configurations with a device, use a pinctrl-N property for some
number N, like this example you could place in your board's DTS file:

  #include "board-pinctrl.dtsi"

  &uart0 {
      pinctrl-0 = <&uart0_default>;
      pinctrl-names = "default";
  };

Properties

Top level properties

These property descriptions apply to “nuvoton,numaker-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name

Type

Details

drive-open-drain

boolean

drive with open drain (hardware AND)

input-schmitt-enable

boolean

enable schmitt-trigger mode

pinmux

array

An array of pins sharing the same group properties. The pins should
be defined using pre-defined macros or, alternatively, using NVT_PINMUX
macros depending on the pinmux model used by the SoC series.

This property is required.

drive-strength

string

Set the driving strength of a pin. Hardware default configuration is low and
it's enough to drive most components, like as LED, CAN transceiver and so on.

Default value: low

Legal values: 'low', 'fast'

slew-rate

string

Set the speed of a pin. This setting effectively limits the
slew rate of the output signal. Hardware default configuration is low.
Fast slew rate could support fast speed pins, like as SPI CLK up to 50MHz.

Default value: low

Legal values: 'low', 'high', 'fast'

digital-path-disable

boolean

disable digital path on a pin.