nordic,nrf-twim

Vendor: Nordic Semiconductor

Description

These nodes are “i2c” bus nodes.

Nordic nRF family TWIM (TWI master with EasyDMA).

This binding can be used for nodes which can represent TWIM
peripherals. A single SoC peripheral ID is often associated with
multiple I2C peripherals, like a TWIM and a TWIS. You can choose
TWIM by setting the node's "compatible" to "nordic,nrf-twim"
and "status" to "okay", e.g. using an overlay file like this one:

    /* This is for TWIM0 -- change to "i2c1" for TWIM1, etc. */
    &i2c0 {
            compatible = "nordic,nrf-twim";
            status = "okay";
            /* other property settings can go here */
    };

This works on any supported SoC, for all TWIM instances.

Note: on nRF51 SoCs, use the "nordic,nrf-twi" binding instead.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

 
Initial clock frequency in Hz

sq-size

int

 
Size of the submission queue for blocking requests

Default value: 4

cq-size

int

 
Size of the completion queue for blocking requests

Default value: 4

pinctrl-0

phandles

 
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-1

phandles

 
Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

 
Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

 
Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

 
Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

 
Names for the provided states. The number of names needs to match the
number of states.

This property is required.

nordic,clockpin-enable

array

 
List of signals that require CLOCKPIN setting enablement.

easydma-maxcnt-bits

int

 
Maximum number of bits available in the EasyDMA MAXCNT register. This
property must be set at SoC level DTS files.

This property is required.

memory-regions

phandle-array

 
List of memory region phandles

memory-region-names

string-array

 
A list of names, one for each corresponding phandle in memory-region

zephyr,concat-buf-size

int

 
Size of a concatenation buffer that the driver is to use for merging
multiple same direction I2C messages that have no RESTART or STOP
flag between them (see e.g. the i2c_burst_write() function) into one
transfer on the bus.

This property must be provided when interacting with devices like
the SSD1306 display that cannot tolerate a repeated start and
address appearing on the bus between message fragments. For many
devices a concatenation buffer is not necessary.

Default value: 16

zephyr,flash-buf-max-size

int

 
TWIM peripherals cannot perform write transactions from buffers
located in flash. If such buffers are expected to be used with
a given instance of the TWIM peripheral, this property must be
set to the maximum possible size of those buffers, so that the
driver can reserve enough space in RAM to copy there the contents
of particular buffers before requesting the actual transfers.

If this property is not set to a value adequate for a given
application, write transactions may fail for buffers that are
located in flash, what in turn may cause certain components,
like the DPS310 sensor driver, to not work.

It is recommended to use the same value for this property and for
the zephyr,concat-buf-size one, as both these buffering mechanisms
can utilize the same space in RAM.

Default value: 16