nuvoton,npcx-fiu-qspi

Vendor: Nuvoton Technology Corporation

Description

These nodes are “qspi” bus nodes.

Properties defining the NPCX Quad-SPI peripheral of Flash Interface Unit (FIU).
A npcx quad-spi dt node would typically looks like:

    &qspi_fiu0 {
        status = "okay";

        int_flash: w25q400@0 {
            status = "okay";
            reg = <0>;
            ...
        };

        ext_flash: w25q256@1 {
            status = "okay";
            reg = <1>;
            ...
        };
    };

`int_flash` and `ext_flash` are the devices accessed by this peripheral.

Properties

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
pinctrl-0	phandles	Pin configuration/s for the first state. Content is specific to the selected pin controller driver implementation.
pinctrl-1	phandles	Pin configuration/s for the second state. See pinctrl-0.
pinctrl-2	phandles	Pin configuration/s for the third state. See pinctrl-0.
pinctrl-3	phandles	Pin configuration/s for the fourth state. See pinctrl-0.
pinctrl-4	phandles	Pin configuration/s for the fifth state. See pinctrl-0.
pinctrl-names	string-array	Names for the provided states. The number of names needs to match the number of states.
en-direct-access-2dev	boolean	Two external SPI devices are supported for Direct Read Access (DRA) on QSPI bus.